The MIPI Alliance has recently released the SoundWire I3S (MIPI SWI3S v1.0) specification for high-bandwidth, low-latency audio applications which unify control and data over a single, power-efficient interface.
SWI3S builds upon the two-pin, multi-drop architecture of MIPI SoundWire released in 2014, and offers higher bandwidth, low power consumption, much better noise immunity, and support for scalable multi-device topologies to meet the increasing requirements of embedded audio systems.
MIPI SWI3S v1.0 supports data rates up to 76 Mbps against 24 Mbps for the earlier SLIMbus and SoundWire audio interfaces, and improves noise immunity by operating in “forwarded clock” or “differential low voltage signaling”. It also implements a range of new features such as Hubs, multiple PHY support, control CRC, power-saving techniques, and more.
MIPI SoundWire I3S key features:
- Transports audio data, control commands, interrupt signals, and synchronization information over a unified two-pin link
- Forwarded bit clock single-ended (FBCSE) and differential low-voltage (DLV) signaling modes.
- Up to ~76 Mbps in DLV mode and ~51 Mbps in FBCSE mode to provide sufficient bandwidth for multi-channel audio and control data streams
- Audio-quality reference clock suitable for standard audio sampling frequencies (e.g., 44.1 kHz, 48 kHz, 96 kHz)
- Periodic payload delivery, including streaming of audio sample data between digital audio components with:
- Multiple channels (supporting fan-out and fan-in configurations across devices)
- Flexible data encodings (e.g., PDM, PCM )
- Mixed or differing sample rates (e.g., 44.1 kHz and 48 kHz within the same system)
- Flow-controlled transmission, allowing both source-controlled and sink-controlled modes
- Low transmission latency, typically around 300 ns end-to-end
- Dedicated in-band channel for control operations, such as register read/write transactions, status reporting, and multi-data transfers for firmware updates
- In-band interrupt notifications, wake-up signaling, and peripheral reset control, enabling event handling without extra GPIO lines
- Power-saving link states, including sleep/wake transitions and clock-pause modes, to reduce power consumption in always-on or idle system scenarios
- Peripheral low power states
A SWI3S system may include one or more links, each with a manager and up to 12 peripherals, including microphones, amplifiers, and others. Typical use cases and applications include:
- Microphone arrays, speakers, amplifiers, haptic drivers, and hearing aid coils
- Echo cancellation, noise suppression, and beam forming
- Always on and low-power designs
- High-fidelity and immersive audio
- Low-latency multichannel audio transfers
The full SWI3S specification is only available to (paid) members, but the MIPI Alliance also released a 14-page technical brief that provides a good overview of the new specification. Looking at the power consumption chart below, the SoundWire I3C is better suited for more complex smart audio systems, while equipment with one or two microphones typically consumes less when using the legacy SoundWire interface, especially in low power mode and with shorter wires.
Additional information may be found on the MIPI website and the press release.
Thanks to TLS for the tip.
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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