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Muse Book laptop features SpacemiT K1 octa-core RISC-V AI processor, up to 16GB RAM

SpacemiT, a chip design company from China with RISC-V as its core technology, recently unveiled the Muse Book laptop based on the K1 octa-core RISC-V chip. Unlike our daily laptops, it has many interesting unique features and is mainly sold to hardware engineers and DIY enthusiasts. This Muse Book runs the Bianbu OS operating system based on the Debian distribution and optimized to run on the SpacemiT K1 octa-core RISC-V SoC. Let’s first take a look at its external interfaces. On the left side of the laptop, there are two USB Type-C interfaces, a USB 3.0 Type-A port, a 3.5mm headphone jack, a microSD card slot, and a reset pinhole. The 8-pin header on the right side of the laptop is quite interesting, and SpacemiT hopes the Muse Book can become one of the most convenient hardware development platforms for RISC-V.  In addition to the power pins, users will find […]

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CAPUF Embedded CH32V003 RISC-V Dev Kit features USB-C, temperature/humidity monitoring, OLED & more

CAPUF Embedded CH32V003 Dev Kit is an all-in-one development board with a USB-C interface, onboard sensors (temperature/humidity), an OLED display, SPI NOR Flash, and ample I/O options. Additionally, it features a Qwicc connector, an RGB LED, and a 3-pin header to connect the WCH-link programmer providing further flexibility for your projects. After the initial release of this “10 cents” CH32V003 RISC-V microcontroller, we have seen $1.5 development boards and an open-source GGC toolchain, as well as Arduino support for the WCH RISC-V microcontrollers. Very recently, CNLohr even managed to transmit LoRa packets with this MCU. CAPUF Embedded CH32V003 Dev Kit Specifications: MCU – WCH CH32V003F4U6 32-bit RISC-V2A microcontroller up to 48 MHz with 2KB SRAM, 16KB flash (QFN20 package) USB – 1x USB-C Port for Power (5V) and Serial Interface with onboard USB to UART converter I/Os – 20 Pin MCU IOs with USART, I2C, SPI, ADC Program & Debugging – […]

Khadas Edge2 Arm mini PC
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ESP32-H4 low-power dual-core RISC-V SoC supports 802.15.4 and Bluetooth 5.4 LE

Espressif Systems has formally announced the ESP32-H4 low-power dual-core 32-bit RISC-V wireless microcontroller with support for 802.15.4 and Bluetooth 5.4 LE portfolio after having unveiled it at CES 2024. It’s the first Espressif chip to support Bluetooth 5.4 LE with previous models such as ESP32-H2 or ESP32-C6 only supporting Bluetooth 5.0/5.2. Besides BLE 5.4 support, the new ESP32-H4 dual-core RISC-V WiSoC is an evolution of the ESP32-H2 single-core chip with PSRAM support (up to 4MB built-in), additional GPIOs (36 vs 24), touch sensing GPIOs, and some extra security features such as a power glitch detector also found in the recently announced ESP32-C61. ESP32-H4 specifications: CPU – Dual-core 32-bit RISC-V core (at up to 96 MHz) RAM – 320KB KB SRAM, optional PSRAM up to 4MB Storage – 128KB ROM, External flash support Wireless connectivity IEEE 802.15.4 radio with Zigbee and Thread support, Matter protocol Bluetooth 5.4 (LE) radio designed in-house, […]

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Imagination launches the APXM-6200 RISC-V “Catapult” CPU for cost-sensitive consumer and industrial applications

Imagination has expanded its Catapult product portfolio to include a new RISC-V core, the Imagination APXM-6200 CPU. The APXM-6200 is a 64-bit, in-order application processor with an 11-stage, dual-issue pipeline. There isn’t much information on the new Imagination RISC-V core on the product page but we know it offers “best-in-class” performance density, a minimal silicon footprint, and industry-standard security features. The CPU is targeted at intelligent consumer and industrial applications and delivers a 2.5x improvement in performance density and a 65% improvement in normalized performance over comparable Arm Cortex-A53 and other cores on the market. It’s also faster than the Cortex-A510 Armv9 core in SpecINT2k6. Imagination claims that combining the APXM-6200 CPU with their GPUs will ensure a 2x increase in bus utilization and a 2x reduction in memory traffic. It also comes with RISC-V vector extensions, and AI compute libraries and supports fast data coupling with AI accelerators for […]

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R9A02G021 is the first microcontroller with Renesas 32-bit RISC-V CPU core design

Renesas R9A02G021 is the first MCU group to use the company’s in-house designed 32-bit RISC-V CPU core with 3.27 CoreMark/MHz, RV32I base plus M/A/C/B extensions, and features such as a stack monitor register, a dynamic branch prediction unit, and a JTAG debug interface. Renesas has been making RISC-V chips at least since 2022 with the likes of RZ/Five 64-bit microprocessor and R9A06G150 32-bit voice control ASSP. All those were based on Andes RISC-V cores, but since the company has now designed its own 32-bit core, future Renesas 32-bit RISC-V microcontrollers are all likely to feature the in-house core, starting with the R9A02G021 general-purpose MCU group. Renesas R9A02G021 key features and specifications: RISC-V Core Renesas RISC-V instruction-set architecture (RV32I + MACB + Ziscr, Control and Status Register (CSR) instructions + RISC-V Zifencei Instruction-Fetch Fence) Maximum operating frequency –  48 MHz Debug and Trace – RISC-V External Debug Support cJTAG Debug Port […]

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Duo S RISC-V/Arm SBC features Sophgo SG2000 SoC, Ethernet, WiFi 6, and Bluetooth 5 connectivity

Shenzhen MilkV Technology’s Duo S is a tiny SBC based on the 1 GHz Sophgo SG2000 Arm Cortex-A53 and RISC-V SoC with 512MB DDR3 (SiP), Fast Ethernet, WiFi 6, and Bluetooth 5 connectivity, and a switch to select Arm or RISC-V architecture before powering the board. We already had covered SG2002 Arm/RISC-V boards with 256MB RAM, namely the LicheeRV Nano and Duo 256M, but for people needing more memory, the Duo S provides another option that also features two 2-lane MIPI CSI connectors, a USB 2.0 host port, and two 26-pin headers for expansion. Its form factor reminds me of FriendlyELEC’s NanoPi NEO and family powered by Allwinner processors that were introduced a few years ago. Duo S specifications: SoC – SOPHGO SG2000 Main core – 1 GHz 64-bit RISC-V C906 or Arm Cortex-A53 core (selectable) Minor core – 700 MHz 64-bit RISC-V C906 core Low-power core – 25 to […]

Intel Arc Graphics Technology
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Efinix Titanium Ti375 FPGA offers quad-core hardened RISC-V block, PCIe Gen 4, 10GbE

Efinix Titanium Ti375 SoC combines high-density, low-power Quantum compute fabric with a quad-core hardened 32-bit RISC-V block and features a LPDDR4 DRAM controller, a MIPI D-PHY for displays or cameras, and 16 Gbps transceivers enabling PCIe Gen 4 and 10GbE interfaces. The Titanium Ti375 also comes with 370K logic elements, 1.344 DSP blocks, 2,688 10-Kbit SRAM blocks, and 27,53 Mbits embedded memory, as well as DSP blocks optimized for computing and AI workloads, and XLR (eXchangeable Logic and Routing) cells for logic and routing. Efinix Titanium Ti375 specifications: FPGA compute fabric 370,137 logic elements (LEs) 362,880 eXchangeable Logic and Routing (XLR) cells 27,53 Mbits embedded memory 2,688 10-Kbit SRAM blocks 1,344 embedded DSP blocks for multiplication, addition, subtraction, accumulation, and up to 15-bit variable-right-shifting Memory – 10-kbit high-speed, embedded SRAM, configurable as single-port RAM, simple dual-port RAM, true dual-port RAM, or ROM FPGA interface blocks 32-bit quad-core hardened RISC-V block […]

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Linux 6.8 release – Notable changes, Arm, RISC-V, and MIPS architectures

Linus Torvalds has just announced the release of Linux 6.8 on the Linux kernel mailing list: So it took a bit longer for the commit counts to come down this release than I tend to prefer, but a lot of that seemed to be about various selftest updates (networking in particular) rather than any actual real sign of problems. And the last two weeks have been pretty quiet, so I feel there’s no real reason to delay 6.8. We always have some straggling work, and we’ll end up having some of it pushed to stable rather than hold up the new code. Nothing worrisome enough to keep the regular release schedule from happening. As usual, the shortlog below is just for the last week since rc7, the overall changes in 6.8 are obviously much much bigger. This is not the historically big release that 6.7 was – we seem to […]

Khadas VIM4 SBC