Linux Category - Page 187 of 605 - CNX Software

June 30, 2021 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

Venice GW7100 compact industrial SBC packs one Gigabit Ethernet port, one mPCIe socket

Gateworks introduced the new Venice Industrial IoT SBC Family based on NXP i.MX 8M Mini processor with up to two Ethernet ports and four mPCIe Sockets last September starting with GW7300 board with dual Gigabit Ethernet and three mPCIe sockets. But the US company has now announced the availability of the smallest member of the family with Venice GW7100 SBC equipped with just one Gigabit Ethernet port and one mPCIe socket in a compact 100x35mm form factor. Venice GW7100 specifications: SoC – NXP i.MX 8M Mini single, dual or quad-core Arm Cortex-A53 processor @ up to 1.6GHz, with Arm Cortex-M4 at 400+MHz, 3D GPU (OpenGL ES 2.0), 2D GPU, and 1080p VPU System Memory – 1 GB LPDDR4 (up to 4GB) Storage – 8 GB eMMC flash (up to 64GB) Connectivity 1x Gigabit Ethernet RJ45 port with passive PoE support WiFi/Bluetooth or Cellular connectivity via mini PCIe socket and Nano-SIM […]

June 29, 2021June 30, 2021 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

Art-Pi STM32H750 Cortex-M7 board supports RT-Thread, mainline Linux

I like to browse Linux changelog to learning about new features in the kernel, but also new hardware that made it into mainline Linux, even if only preliminary or partial. And in the just-released Linux 5.13, one board that caught my eye was Art-Pi, powered by an STMicro STM32H750 Cortex-M7 microcontroller without MMU (memory management unit) that was initially designed for RT-Thread real-time operating system. Art-Pi specifications: MCU – STM32H750XBH6 Value Line Cortex-M7 microcontroller @ 400 MHz, with 128KB flash, 16KB D/I cache, 864 SRAM, 64KB+128KB TCM with ECC correction System Memory – 32MB SDRAM Storage – MicroSD card slot, 16 MB SPI flash, 8MB QSPI flash Display – FPC connector for RGB888 displays Connectivity – SDIO WiFi 4 and UART Bluetooth via Ampak AP6212 module USB – 1x USB OTG Type-C port Debugging – On-board ST-LINK/V2.1 via USB-C DBG port Expansion – 2x 40-pin P1 & P2 headers with […]

June 28, 2021July 5, 2021 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Custom Raspberry Pi 3 SBC with eMMC flash powers gateway for washing machines

As I was browsing some group on Facebook, I noticed somebody had bought a custom Broadcom BCM2837 SBC that looks very much like a Raspberry Pi 3 board, and that thing was apparently bought from a Saleng, a three-wheeled motorbike with a side cart where people can buy and sell old/second-hand items. All good fun… So without further ado, here’s what the board looks like… Click for higher resolution photos. Both MIPI CSI and DSI connectors are gone, and so is the AV jack. Two of the USB 2.0 ports have made place for a micro USB port and some headers. Looking at the bottom of the board, the MicroSD card slot is gone, because there’s a 16GB Kingston eMMC flash for storage in that location. At first, I was quite confused, first because the Raspberry Pi logo is nowhere to found, then it’s the first “Raspberry Pi” SBC I […]

June 28, 2021July 2, 2021 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Linux 5.13 Release – Notable changes, Arm, MIPS and RISC-V architectures

Linus Torvalds has just announced the release of Linux 5.13: So we had quite the calm week since rc7, and I see no reason to delay 5.13. The shortlog for the week is tiny, with just 88 non-merge commits (and a few of those are just reverts). It’s a fairly random mix of fixes, and being so small I’d just suggest people scan the appended shortlog for what happened. Of course, if the last week was small and calm, 5.13 overall is actually fairly large. In fact, it’s one of the bigger 5.x releases, with over 16k commits (over 17k if you count merges), from over 2k developers. But it’s a “big all over” kind of thing, not something particular that stands out as particularly unusual. Some of the extra size might just be because 5.12 had that extra rc week. And with 5.13 out the door, that obviously means […]

June 27, 2021June 27, 2021 by Jean-Luc Aufranc (CNXSoft) - No Comments

Coral Dev board news – NXP critical firmware update, manufacturing demo, and WebCoral in Chrome

Google Coral is a family of development boards, modules, M.2/mPCIe cards, and USB sticks with support with local AI, aka on-device or offline AI, based on Google Edge TPU. The company has just published some updates with one important firmware update, a manufacturing demo for worker safety & visual inspection, and the ability to use the Coral USB accelerator in Chrome. Coral firmware update prevents board’s excessive wear and tear If you own the original Coral development board or system-on-module based on NXP i.MX 8M processor, you may want to update your Mendel Linux installation with:

sudo apt update
sudo apt dist-upgrade

1 2	sudo apt update sudo apt dist-upgrade

The update includes a patch from NXP with a critical fix to part of the SoC power configuration. Without this patch, the SoC might overstress and the lifetime of your board could be reduced. Note this only affects NXP-based boards, so other Coral products such as Coral Dev Mini powered by Mediatek MT8167S […]

June 25, 2021 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

UG65 LoRaWAN gateway supports Node-RED, up to 2,000 nodes

Node-RED is a popular flow-based, visual programming development tool originally developed by IBM for wiring together hardware devices, APIs, and online services as part of the Internet of Things. But despite being designed for the IoT, I’ve seldom seen Node-RED support for LoRaWAN hardware, the only exception being the Axon platform, a tiny WiFi & LoRaWAN board. But there’s at least one more option with Milestone IoT’s UG65 LoRaWAN gateway, launched late last year, getting a firmware update that adds Node-RED support. UG65 LoRaWAN gateway specifications: SoC – NXP quad-core Cortex-A53 processor @ 1.5 GHz System Memory – 512 MB DDR4 RAM Storage – 8 GB eMMC flash Connectivity LoRaWAN Semtech SX1302 based Fully Integrated Internal Antenna (Optional: 1 × 50 Ω N-Female External Antenna Connector) 8 channels Frequency Bands – CN470, IN865, EU868, RU864, US915, AU915, KR920, AS923 Sensitivity – -140dBm Sensitivity @292bps Output Power – 27dBm Max Protocol […]

June 24, 2021June 25, 2021 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

NVIDIA TAO Transfer Learning Toolkit (TLT) 3.0 released with pre-trained models

NVIDIA first introduced the TAO (Train, Adapt and Optimize) framework to eases AI model training on NVIDIA GPU’s as well as NVIDIA Jetson embedded platforms last April during GTC 2021. The company has now announced the release of the third version of the TAO Transfer Learning Toolkit (TLT 3.0) together with some new pre-trained models at CVPR 2021 (2021 Conference on Computer Vision and Pattern Recognition). The newly released pre-trained models are applicable to computer vision and conversational AI, and NVIDIA claims the release provides a set of powerful productivity features that boost AI development by up to 10 times. Highlights of TAO Transfer Learning Toolkit 3.0 Various computer vision pre-trained models for Computer vision: Body Pose estimation model that supports real-time inference on edge with 9x faster inference performance than the OpenPose model. Emotion recognition Facial landmark License plate detection and recognition Heart rate estimation Gesture recognition Gaze estimation […]

June 23, 2021June 24, 2021 by Jean-Luc Aufranc (CNXSoft) - 22 Comments

SiFive Performance P550 is the fastest 64-bit RISC-V processor so far

SiFive Performance P550 fastest RISC-V processor

SiFive has announced two RISC-V “Performance” cores with Performance P550 that should be the fastest 64-bit RISC-V processor so far with a SPECInt 2006 score of 8.65/GHz, as well as a Performance P270 Linux capable processor with full support for the RISC-V vector extension v1.0 rc. SiFive Performance P550 P550 highlights: RISC-V RV64GBC ISA 13 stage, 3-issue high-performance out-of-order pipeline Supports multicore coherence with up to 4 cores in a core complex Private 32KB+32KB L1 cache and a private 256KB L2 cache per core Up to 4MB L3 cache in a four-core cluster SPECint 2006 – 8.65/GHz 2.4 GHz in 7nm with a footprint of less than 0.25 mm SiFive compares the Performance P550 core to Arm’s Cortex-A75 with higher performance in SPECint2006 and SPECfp2006 integer/floating-point benchmark, all a much smaller area which would enable a quad-core P550 cluster on about the same footprint as a single Cortex-A75 core. There […]