MYIR launches FZ5 EdgeBoard AI Box for AI on the Edge

Back in July of this year (2020), MYRI technology announced the MYIR’s FZ3 deep learning accelerator card powered by the Xilinx Zynq UltraScale+ ZU3EG Arm FPGA MPSoC and it is capable of delivering up to 1.2TOPS computing power. With only a few months since that launch, MYRI technology is now announcing another two related sets of products – FZ5 EdgeBoard AI Box and the FZ5 Card. The FZ5 EdgeBoard AI Box is an AI-focused computing platform that is based on the FZ5 AI Accelerator card which is an upgrade of the FZ3 card. The FZ5 looks more like a single board computer than an actual computing card. The FZ5 accelerator is powered by the Xilinx Zynq UltraScale+ ZU5EV MPSoC which features a 1.5 GHz quad-core Arm Cortex-A53 64-bit application processor, a 600MHz dual-core real-time Arm Cortex-R5 processor, a Mali400 embedded GPU and is capable of delivering up to 2.4 TFLOPS as compared to the predecessor FZ3’s 1.2 TFLOPS based on the Xilinx …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples

ZynqBerryZero Brings Xilinx Zynq-7010 FPGA SoC to Raspberry Pi Zero Form Factor

Trenz Electronic introduced ZynqBerry in 2017 as a Xilinx Zynq FPGA board following Raspberry Pi 2/3 Model B form factor, and the company has now just launched another Raspberry Pi inspired FPGA board with ZynqBerryZero following Raspberry Pi Zero form factor. ZynqberryZero is equipped with a Xilinx Zynq-7000 series FPGA & Arm Cortex-A9 SoC combined with 512 MB RAM and 16MB flash, and offers all Raspberry Pi Zero ports namely a 40-pin GPIO header, two micro USB ports, a mini HDMI connector, a CSI connector, and micro SD card slot. ZynqBerryZero specifications: SoC – Xilinx Zynq XC7Z010-1CLG225C with dual-core Cortex-A9 clocked up to 667 MHz, FPGA fabric with 28K logic cells,  2.1Mbit block RAM, and 80x DSP slices System Memory – 512 MB DDR3L SDRAM Storage – 16 MB Flash memory, MicroSD card slot Video Output – Mini HDMI connector, type C Camera – CSI-2 connector USB – 1x Micro USB for JTAG/UART, 1x Micro USB 2.0 port Expansion – …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples

IoTSDR Linux Board Targets the Development of IoT Gateways with Standard or Custom IoT Protocols (Crowdfunding)

Xilinx Zynq-7010/-7020 powered iotSDR board by EmbedINN enables the development of IoT gateways with support for LoRa, SigFox, WeightLess, Bluetooth, BLE, 802.15.4, ZigBee, as well as custom IoT protocols. The board also supports GPS, Galileo, Beidou, and GLONASS navigation systems thanks to a Maxim Integrated MAX2769 GNSS chip. iotSDR key hardware features and specifications: SoC (one or the other) Xilinx Zynq-Z7010 (XC7Z010-1CLG400C) dual-core Arm Cortex-A9 processor with 256 kb on-chip memory, FPGA fabric with 28,000 logic cells, 17,600 LUTs, 2.1 Mb block RAM, 80 DSP slices Xilinx Zynq-Z7020 (XC7Z020-1CLG400C) dual-core ARM Cortex-A9 processor with 256 kb on-chip memory, FPGA fabric with 85,000 logic cells, 53,200 LUTs, 4.9 Mb block RAM, 220 DSP slices System Memory – 512 MB DDR3 Storage 128 Mbit QSPI flash memory for firmware Microchip AT24MAC602 SPI EEPROM for RF transceiver MCU firmware and data Radios “IoT” Radios RF Transceivers – 2x Microchip/Atmel AT86RF215 European band – 863-870 MHz / 870-876 MHz / 915-921 MHz Chinese band …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples

Zynq UltraScale+ Arm FPGA FZ3 Deep Learning Accelerator Card Supports Baidu Brain AI Tools

MYIR’s FZ3 card is a deep learning accelerator board powered by Xilinx Zynq UltraScale+ ZU3EG Arm FPGA MPSoC delivering up to 1.2TOPS for artificial intelligence products based on Baidu Brain AI open platform. The FZ3 card also features 4GB RAM, 8GB eMMC flash, USB 2.0 & USB 3.0 ports, Gigabit Ethernet, DisplayPort (DP) output, PCIe interface, MIPI-CSI and more. MYIR FZ3 card specifications: SoC – Xilinx Zynq UltraScale+ XCZU3EG-1SFVC784E (ZU3EG) MPSoC Quad-core Arm Cortex-A53 @ 1.2 GHz Dual-core Arm Cortex-R5 processor @ 600MHz Arm Mali-400MP2 GPU FPGA fabric System Memory – 4GB DDR4 Storage – 8GB eMMC flash, 32MB QSPI flash, 32KB EEPROM, MicroSD card slot Video Output – 1x Mini DisplayPort up to 4Kp30 Camera I/F 1 x MIPI-CSI Interface (25-pin 0.3mm pitch FPC connector) 1 x BT1120 Camera Interface (32-pin 0.5mm pitch FPC connector) Connectivity – 1x Gigabit Ethernet USB – 1x USB 2.0 Host, 1x USB 3.0 Host  Expansion 1x PCIe 2.1 Interface (1-lane) Two 2.54mm pitch 2×20-pin …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples

Sipeed TANG Hex is a Low-Cost Xilinx Zynq-7020 Arm FPGA Board

Last year, Sipeed launched a $5 FPGA board called Sipeed Tang and based on an entry-level Gowin GW1N-1-LV FPGA. But I had not noticed the company had also worked on a more powerful, yet still low-cost Xilinx Zynq-7020 board in a business card form factor not too dissimilar from the Raspberry Pi model B form factor. Meet Sipeed TANG Hex. So far a low-cost Zynq-7010 or Zynq-7020 board met you had to spend $99 to $199 with products such as MyIR Z-Turn and Digilent PYNQ-Z1. But Sipeed Tang HEX can be purchased for as little as $73 shipping on Aliexpress,  or 439 RMB ($62) on Taobao for people based in mainland China. It might be tempting to get a low-cost board to get started, but is it worth it? Read on to find out. Sipeed TANG Hex specifications: SoC – Xilinx Zynq-7020 (XC7Z020-1CLG484) dual-core Arm Cortex-A9 processor and FPGA with 85K logic cells, 4.9Mb Block RAM, 220 DSP slices System …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples

4K Vision Edge Computing Platform Features Xilinx Zynq UltraScale+ ZU3EG MPSoC

Last year, MyIR Tech introduced MYD-CZU3EG development board powered by a Xilinx Zynq UltraScale+ ZU3EG MPSoC with Arm Cortex-A53 cores and FPGA fabric designed for applications such as cloud computing, machine vision, flight navigation, and other complex embedded applications. The company has now announced another Zynq Ultrascale+ ZU3EG based platform dedicated to machine vision. The VECP Starter Kit (Vision Edge Computing Platform) is comprised of MYD-CZU3EG-ISP development board fitted with the company’s MYC-CZU3EG Zynq UltraScale+ MPSoC CPU module, a fansink, and a SONY IMX334 4K camera sensor. MYD-CZU3EG-ISP development board specification: MYC-CZU3EG SoM MPSoC – Xilinx Zynq UltraScale+ XCZU3EG-1SFVC784E (ZU3EG, 784 Pin Package) MPSoC with quad-core Arm Cortex-A53 processor @ 1.2 GHz, dual-core Cortex-R5 processor @ 600 MHz, Arm Mali-400MP2 GPU, and 16nm FinFET+ FPGA fabric (154K logic cells, 7.6 Mb memory, 728 DSP slices) System Memory – 4GB DDR4 @ 2,400MHz Storage – 4GB eMMC Flash, 128MB QSPI Flash PS unit (Processing Subsystem i.e. Arm Cortex cores) Storage – …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples

NetBSD 9.0 Released with Aarch64 Support, Arm ServerReady Compatibility

Yesterday, we wrote about Raspberry Pi 4 getting UEFI+ACPI firmware for Arm SSBR compliance allowing the board to run operating systems designed for “Arm ServerReady” servers out of the box. NetBSD 9.0 was just released on February 14, 2020, with support for Aarch64 (64-bit Arm) which had been in the works for a few years, and includes support for “Arm ServerReady” compliant machines (SBBR+SBSA). NetBSD 9.0 main changes related to hardware support: Support for AArch64 (64-bit Armv8-A) machines Compatibility with “Arm ServerReady” compliant machines (SBBR+SBSA) using ACPI. Tested on Amazon Graviton and Graviton2 (including bare metal instances), AMD Opteron A1100, Ampere eMAG 8180, Cavium ThunderX, Marvell ARMADA 8040, QEMU w/ Tianocore EDK2 Symmetric and asymmetrical multiprocessing support (big.LITTLE) Support for running 32-bit binaries via COMPAT_NETBSD32 on CPUs that support it Single GENERIC64 kernel supports ACPI and device tree based booting Supported SoCs Allwinner A64, H5, H6 Amlogic S905, S805X, S905D, S905W, S905X Broadcom BCM2837 (Raspberry Pi 3B) NVIDIA Tegra X1 …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples

ESP Open Source Research Platform Enables the Design of RISC-V & Sparc SoC’s with Accelerators

FOSDEM 2020 will take place next week, and there will be several interesting talks about open-source hardware and software development. One of those is entitled “Open ESP – The Heterogeneous Open-Source Platform for Developing RISC-V Systems” with an excerpt of the abstract reading: ESP is an open-source research platform for RISC-V systems-on-chip that integrates many hardware accelerators. ESP provides a vertically integrated design flow from software development and hardware integration to full-system prototyping on FPGA. For application developers, it offers domain-specific automated solutions to synthesize new accelerators for their software and map it onto the heterogeneous SoC architecture. For hardware engineers, it offers automated solutions to integrate their accelerator designs into the complete SoC. If we go to the official website, we can see ESP (Embedded Scalable Platform) actually supports both 32-bit Leon3 (Sparc) and 64-bit Ariane (RISC-V) cores, and various hardware accelerators from the platform or third parties. Highlights: Architecture Tile-based architecture: processor, memory and accelerator tiles NoC (Network-on-Chip) …

Support CNX Software – Donate via PayPal, become a Patron on Patreon, or buy review samples