fpga

Posted on by Sayantan Nandy - No Comments on Trenz Electronic AXE5-EAGLE-ES devkit features Intel Agilex 5 E-Series SoC FPGA

Trenz Electronic AXE5-EAGLE-ES devkit features Intel Agilex 5 E-Series SoC FPGA

AXE5-EAGLE-ES

The Trenz Electronic AXE5-EAGLE-ES devkit (development kit) is powered by an Intel Agilex 5 E-series SoC FPGA, codenamed Sundance Mesa. It is designed for FPGA applications in sectors such as wireless communication, video broadcast, and defense. The kit provides 656k logic elements and a quad-core processing system featuring dual-core Arm Cortex-A76 and Cortex-A55 clusters. It supports high-speed transceivers up to 17 Gbps, PCIe 4.0 connectivity, and integrated memory interfaces like DDR4 and LPDDR4/5. Built on Intel’s 7 technology, the Agilex 5 architecture is optimized for midrange FPGA applications, offering a compact design with efficient performance-per-watt. The FPGA includes enhanced DSP blocks with AI Tensor capabilities for AI and digital signal processing tasks. Additionally, it incorporates Intel’s second-generation Hyperflex Architecture, enabling greater flexibility for handling dynamic workloads. Previously, we covered the iW-RainboW-G58M system-on-module, which features Intel’s Agilex 5 SoC FPGA E-series, a cost-effective, midrange solution for intelligent edge and embedded applications. […]

Posted on by Debashis Das - 4 Comments on Altera’s 7nm Agilex 3 SoC FPGA features Cortex-A55 cores, AI Tensor Block, DSP, 10 GbE, and more.

Altera’s 7nm Agilex 3 SoC FPGA features Cortex-A55 cores, AI Tensor Block, DSP, 10 GbE, and more.

Altera Agilex 3 AI SoC FPGA

Altera, an independent subsidiary of Intel, has launched the Altera Agilex 3 SoC FPGA lineup built on Intel’s 7nm technology. According to Altera, these FPGAs prioritize cost and power efficiency while maintaining essential performance. Key features include an integrated dual-core Arm Cortex A55 processor, AI capabilities within the FPGA fabric (tensor blocks and AI-optimized DSP sections), enhanced security, 25K–135K logic elements, 12.5 Gbps transceivers, LPDDR4 support, and a 38% lower power consumption versus competing FPGAs. Built on the Hyperflex architecture, it offers nearly double the performance compared to previous-generation Cyclone V FPGAs. These features make this device useful for manufacturing, surveillance, medical, test and measurement, and edge computing applications. Altera’s Agilex 3 AI SoC FPGA specifications Device Variants B-Series – No definite information is available C-Series – A3C025, A3C050, A3C065, A3C100, A3C135 SoC FPGAs Hard Processing System (HPS) – Dual-core 64-bit Arm Cortex-A55 up to 800 MHz that supports secure […]

Posted on by Tomisin Olujinmi - 8 Comments on ThunderScope is an open-source Thunderbolt and PCIe oscilloscope with a 1 GS/s data sampling rate (Crowdfunding)

ThunderScope is an open-source Thunderbolt and PCIe oscilloscope with a 1 GS/s data sampling rate (Crowdfunding)

ThunderScope Thunderbolt version

The ThunderScope is an open-source, Thunderbolt/USB4 and PCIe oscilloscope with a sampling rate of up to 1 GS/s. It is portable, presents an affordable, open-source alternative to expensive bench-top and PC-based scopes, and delivers a higher sampling rate than most USB oscilloscopes. ThunderScope streams sample data to your computer for processing and analysis, unlike traditional oscilloscopes which “are limited by their built-in processing capabilities and cramped user interfaces.” It uses the fastest available interface, Thunderbolt, to stream data, allowing it to use your computer’s full potential. ThunderScope is “the only scope that will get better every time you upgrade your computer.” The Thunderbolt oscilloscope is based on AMD’s Artix 7 XC7A35T-2CSG325C FPGA. It supports up to four channels and a full analog bandwidth of 500 MHz (with the anti-aliasing filter disabled). It doesn’t require an external power source, as it is powered via the Thunderbolt port. It comes in a […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Efinix introduces the low-power Topaz RISC-V SoC FPGA family for “high-volume, mass-market applications”

Efinix introduces the low-power Topaz RISC-V SoC FPGA family for “high-volume, mass-market applications”

Efinix Topaz RISC-V SoC FPGA

Efinix Topaz is a new low-power RISC-V SoC FPGA family manufactured with the same 16nm TSMC process as the Efinix Titanium SoC FPGA, but optimized for high-performance in a low-power footprint, and targetting high-volume, mass-market applications. The Topaz SoC FPGAs provide fewer features than the Titanium family but still offer up to four RISC-V hard cores, PCIe Gen3, MIPI interfaces, LPDDR4, LVDS, and 12.5 Gbps transmitter with most features being optional and depending on the exact SKUs selected. Efinix Topaz key features and specifications: FPGA compute fabric Up to 326,080 logic elements (LEs) Up to 19.22 Mbits embedded memory Up to 1,877 10-Kbit SRAM blocks Up to 1,008 embedded DSP blocks Memory – 10-kbit high-speed, embedded SRAM, configurable as single-port RAM, simple dual-port RAM, true dual-port RAM, or ROM FPGA interface blocks Optional 32-bit quad-core hardened RISC-V block (RISCV32I with M, A, C, F, and D extensions and six pipeline […]

Posted on by Debashis Das - 1 Comment on Lattice MachXO5D-NX FPGA family enables Hardware Security in Programmable FPGAs

Lattice MachXO5D-NX FPGA family enables Hardware Security in Programmable FPGAs

Lattice MachXO5D NX FPGA dev board

Lattice Semiconductor has recently introduced the MachXO5D-NX FPGA family, which integrates a hardware root of trust (RoT) into low-power FPGAs. This addresses security challenges by combining on-chip Flash memory and hardware encryption to minimize code capture risks during load time. The MachXO5D-NX family includes three variants with logic cell counts of 27k (FMXO5-25), 53k (LFMXO5-55T), and 96k (LFMXO5-100T). These FPGAs feature built-in hardware encryption, a cryptographic engine supporting AES-256, ECDSA-384/521, SHA2-256/384/512, and RSA 3072/4096, and a unique secret identity (USID) for device identity protection. Built on a 28-nm fully-depleted silicon-on-insulator (FD-SOI) process, these FPGAs reduce power consumption by 75% and lower soft error rates by 100x(as the company mentions). They support interfaces such as MIPI D-PHY (CSI-2, DSI), LVDS, Gigabit Ethernet, and PCIe, making them suitable for secure edge applications. Lattice MachXO5D-NX FPGA family specifications FPGA – Lattice Semi MachXO5D-NX FPGA family (27k (FMXO5-25), 53k (LFMXO5-55T), and 96k (LFMXO5-100T)) Programmable […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Lattice Semi Certus-NX-09 and Certus-NX-28 small footprint, low-power FPGAs feature optional PCIe Gen2 interface

Lattice Semi Certus-NX-09 and Certus-NX-28 small footprint, low-power FPGAs feature optional PCIe Gen2 interface

Lattice Certux-NX FPGA

Lattice Semiconductor has added two new devices to its small, low-power Lattice Certus-NX FPGA family, namely the Certus-NX-28 and Certus-NX-09 available in multiple packages and designed for communications, computing, industrial, and automotive applications. The Certus-NX FPGAs enable power-efficient PCIe Gen 2 with up to 4 times lower power compared to other FPGAs, and ultra-small form factor with up to 2 times more I/O per mm2 and PCIe and Gigabit Ethernet implementation in packages as small as 36 mm2. The company also claims high reliability and security with up to 100 times lower soft error rate, built-in SEC (Soft Error Correction) and memory block ECC for SEU (Single-Even Upset) protection, and up to 12 times faster instant-on configuration performance. The Lattice Certus-NX family is now comprised of four SKUs: LFD2NX-9, LFD2NX-17, LFD2NX-28, and LFD2NX-40 whose main highlights are shown in the comparison table below. The Certus-NX are available in various packages […]

Posted on by Tomisin Olujinmi - 8 Comments on $180 Zeal 8-bit Computer Complete Edition is an all-in-one retrocomputing platform based on the Zilog Z80 microprocessor

$180 Zeal 8-bit Computer Complete Edition is an all-in-one retrocomputing platform based on the Zilog Z80 microprocessor

Zeal 8 bit Computer Complete Edition

The Zeal 8-bit Computer Complete Edition is a system that aims to bring retrocomputing to the modern age with the aid of a motherboard built around the Zilog Z80 microprocessor and several peripherals. The Zeal 8-bit Computer project began in early 2021 and has been released in bits and pieces since then. Now, a finalized version tagged the “Complete Edition” is ready for release to the public. It promises a modern retrocomputing experience with the simplicity of retro computers and support for relatively recent features such as VGA graphics, TF cards, and NOR flash. The Zeal 8-bit Computer Complete Edition includes the following components: the Zeal 8-bit Computer motherboard, the Zeal 8-bit Video Board, and a 3D-printed enclosure with a touch sensor for turning the board on/off. The Zeal 8-bit Video Board is based on a Lattice ECP5 FPGA and can output up to 65,536 colors via VGA. It also […]

Posted on by Debashis Das - 1 Comment on Renesas SLG7EVBFORGE FPGA dev board is built around ForgeFPGA SLG47910V low-density FPGA

Renesas SLG7EVBFORGE FPGA dev board is built around ForgeFPGA SLG47910V low-density FPGA

Renesas SLG7EVBFORGE 1K LUT ForgeFPGA Evaluation Board

Renesas SLG7EVBFORGE FPGA dev board, built around SLG47910V is Renesas’ first low-density FPGA in the ForgeFPGA family. The FPGA includes 1120 LUTs, 1120 flip-flops, 5kb of distributed memory, 32kb of block RAM, and a 50 MHz on-chip oscillator with a phase-locked loop (PLL). With robust features, low power consumption, and affordable pricing this FPGA can be used in applications in sensor data aggregation, consumer electronics, and portable computing devices. The SLG47910V FPGA gets connected to a ZIF socket to the development board, this design choice puts out a clear sign that upcoming Forge family FPGAs will support this dev board. Additionally, it features Pmod connectors and configurable power sources. The dev board can be programmed via OTP Non-Volatile Memory or SPI interface and additional features get managed through Renesas’ Go Configure Software Hub. Previously we have written about similar low-power low-cost FPGA boards like the Sipeed Tang Mega 138K, the […]

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