networking

Posted on by Jean-Luc Aufranc (CNXSoft) - 23 Comments on $100 Qotom Q1900G4-M Nano-ITX Board Powered by Intel Celeron J1900 SoC is Equipped with Four Gigabit Ethernet Ports

$100 Qotom Q1900G4-M Nano-ITX Board Powered by Intel Celeron J1900 SoC is Equipped with Four Gigabit Ethernet Ports

Qotom Q1900G4-M is a motherboard designed for networking applications thanks to four Gigabit Ethernet ports connected to an Intel Celeron J1900 quad core “Bay Trail” processor. The board supports up to 8GB DDR3 RAM via a SO-DIMM slot, storage through a SATA port and an mSATA connector, and WiFi or cellular connectivity through a mini PCIe slot and SIM card slot. Qotom Q1900G4-M board specifications: SoC – Intel Celeron J1900 quad core “Bay Trail” processor  @ 2.0 GHz / 2.41 GHz (Burst) with Intel HD graphics (10W TDP) System Memory – 1x SO-DIMM sockets for up to 8GB DDR3 memory Storage – 1x SATA 3.0 port + power (14 & 15), 1x mini PCIe connector for mSATA SSD (16) Video Output – VGA (5) Connectivity 4x Gigabit Ethernet ports (3) with Wake-on-LAN support SIM card socket (17) USB only mini PCIe connector for WiFi, 3G or 4G (18) USB – 3x […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on F&S Elektronik Introduces efus A53LS NXP QorIQ LS1012A System-on-Module for Communication & Networking Applications

F&S Elektronik Introduces efus A53LS NXP QorIQ LS1012A System-on-Module for Communication & Networking Applications

NXP QorIQ LS1012A is a single core Cortex A53 communication processor that offers a 64-bit update to LS1021A dual core Cortex A7 processors found in gateways such as NXP LS1021A-IOTA IoT gateway reference design, and F&S Elektronik System has just launched efus A53LS system-on-module powered by the processor with up to 1GB RAM, up to 64SQPI NOR, access to the communication interfaces and peripherals from the processor via an efus compliant edge connector, and long term availability until 2030. efus A53LS COM specifications: Processor – NXP QorIQ Layerscape LS1012A  single core ARM Cortex-A53 @ up to 800MHz System Memory – 512MB DDR3 by default, supports up to 1GB DDR3 RAM Storage – Up to 64MB QSPI NOR flash on-module, I/Os for SATA and SD card on edge connector Connectivity – 2x Realtek RTL8211F(N) Gigabit Ethernet transceiver chips, optional wireless module with dual WiFi IEEE802.11b/g/n/ac and Bluetooth 4.0 LE efus edge […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 7 Comments on Make-WiFi-Fast Project Massively Improves WiFi Performance of Busy WiFi Routers

Make-WiFi-Fast Project Massively Improves WiFi Performance of Busy WiFi Routers

WiFi is a great way to add connectivity to a large group of people, but once everybody tries to connect at the same time, the network often becomes unusable due to very high latency, a problem that can occur on servers on the ISP side too, and that’s usually caused by excessive buffering, Bufferbloat. The Bufferbloat project aims to resolve this issue with both routers using CoDel and fq_codel algorithms, as well as WiFi  via Make-WiFi-Fast project. Dave Täht gave a presentation of his work on Make-WiFi-Fast project entitled “Fixing WiFi Latency… Finally“showing how latency was reduced from seconds to milliseconds. It’s quite technical, but two slides of the presentation clearly shows the progress made. The first chart shows 100 stations connecting to a website using unpatched code with the top of the chart showing the bandwidth per node in MBits/s, while the lower part showing latency in ms. We […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Imagination Technologies Announces MIPS Warrior I-class I6500 Heterogeneous CPU with up to 384 Cores

Imagination Technologies Announces MIPS Warrior I-class I6500 Heterogeneous CPU with up to 384 Cores

Imagination has just unveiled the successor of MIPS I6400 64-Bit Warrior Core with MIPS Warrior I-class I6500 heterogeneous CPU supporting up to 64 cluster, with up to 6 cores each (384 cores max), themselves up to 4 thread (1536 max), combining with IOCU (IO coherence units), and external IP such as PowerVR GPU or other hardware accelerators. The main features of MIPS I6400 processor are listed as follows:   Heterogeneous Inside – In a single cluster, designers can optimize power consumption with the ability to configure each CPU with different combinations of threads, different cache sizes, different frequencies, and even different voltage levels. Heterogeneous Outside – The latest MIPS Coherence Manager with an AMBA ACE interface to popular ACE coherent fabric solutions such as those from Arteris and Netspeed lets designers mix on a chip configurations of processing clusters – including PowerVR GPUs or other accelerators – for high system […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 34 Comments on SolidRun MACCHIATOBin is Another Marvell ARMADA 8040 Networking Mini-ITX Board

SolidRun MACCHIATOBin is Another Marvell ARMADA 8040 Networking Mini-ITX Board

We’ve already seen SolidRun is working on a Marvell ARMADA 8040 quad core Cortex A72 community board for networking and storage applications, but based on a picture taken at Linaro Connect, the company is also working on a similar board with extra connectivity options called MACCHIATOBin. Apart from the picture, there’s no info on the web about this board, so we’ll have to derive specs from the photo, the community board features, and info provided by Marcin Juszkiewicz, so all details are preliminary and subject to change: SoC – ARMADA 8040 (88F8040) quad core Cortex A72 processor @ up to 2.0 GHz System Memory – 1x DDR4 DIMM up to 16GB RAM Storage – 3x SATA 3.0 port + micro SD slot Connectivity – 1x Gigabit RJ45 port, 1x SFP SGMII @ 2.5Gbps, 2x 10Gbps copper (RJ45) with auto switchover to dual SFP+ Expansion – 1x PCIe-x4 3.0 slot, Marvell […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 1 Comment on How to check HTTP Header and Connection Stats from the Command Line

How to check HTTP Header and Connection Stats from the Command Line

A few days ago, I discussed with somebody whether a file was cached by Cloudflare or not, and this involved getting the HTTP header, and checking for CF-RAY field to see if data is going through one of Cloudflare data centers. This can be done with curl:

In the command above, -s stands for silent so that curl does not show the progress meter, -v stands for verbose to show the header, and -o /dev/null is used to discard the packet load. You can also use -I option (fetch the HTTP-header only) with curl, which – if all you need is the HTTP header – provides a cleaner output:

I also came across httpstat Python script recently via n0where, doing much of the same thing, except it also adds transfer statistics. It can be installed by downloading httpstat.py, or better using pip:

Let’s try it with this very […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 6 Comments on FriendlyARM NanoPi NEO Board Benchmarks

FriendlyARM NanoPi NEO Board Benchmarks

We’ve already seen how to setup NanoPi NEO with Ubuntu Core, and while it’s mostly designed as an IoT node, for example to control relays over Ethernet or the Internet, I’ve still decided to see how it would perform under load by running Phoronix benchmarks, and then network and storage (micro SD card provided by FriendlyARM). It’s a small board, so we should expect it to heat a lot under load, especially it does not come with an heatsink by default. Also bear in mind that performance may dramatically change depending on the software implementation, and for the test, I’m using the company’s Ubuntu Core firmware. Before start the benchmark, I noticed that QTe-Demo was running in the background, probably because it was used on their other board with video output or LCD. but it’s taking some CPU usage, and is absolutely not needed here. To disable it, edit /etc/rc.local, […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 8 Comments on Setting a VoIP SIP user agent with Embedded Linux

Setting a VoIP SIP user agent with Embedded Linux

This is a guest post by Leonardo Graboski Veiga, working for Toradex. Introduction This article’s main goals are: to cross-compile the PJSIP libraries and the PJSUA API reference implementation; deploy it to the target system; give an overview about the SIP protocol; and explore the reference implementation features, regarding audio only. For this purpose, a Computer on Module (CoM) from Toradex was chosen in the following configuration: Colibri iMX6DL* + Colibri Evaluation Board. The evaluation board and CoM are displayed in Figures 1 and 2, respectively.   VOIP or Voice over IP, is a term designed to refer to a set of methods and technologies targeted for the implementation of telephony services over the Internet. For the purpose of this article, the scope will be limited to the use of a reference implementation built upon the SIP communication handling protocol by means of the PJSIP libraries and PJSUA2 API. If […]

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