Renesas R-Car H3 Deca-Core Processor and Driverless Car Roadmap

Renesas has recently unveiled R-Car H3 deca-core processor for automotive applications with four Cortex A57 cores, four Cortex A5 cores, and two Cortex-R7 “dual-lock step” cores for real-time processor, and has part the releases showed the expected roadmap for the implementation of driverless / autonomous cars. Let’s start with the processor (R8A77950) and SiP module (R8J77950) specifications: CPU cores –  quad core  ARM Cortex-A57, quad core ARM Cortex-A53, and dual lock-step ARM Cortex-R7 cores with respectively 48KB/32KB, 32KB/32KB, and 32KB/32KB L1 instructions/operand cache. GPU – IMG PowerVR Series6XT GX6650 External memory – LPDDR4-SDRAM up to 1600 MHz, data bus width: 32 bits x 4 ch (12.8GB/s x 4) Expansion bus – 2 ch PCI Express2.0 (1 lane) Video Out – 3x display output Input / camera – 8x video inputs Video codec module (H.265, H.264/AVC, MPEG-4, VC-1, etc.) IP conversion module 2x TS Interfaces Stream and Security Processor Video image […]

Renesas RZ/A1H Starter Kit and Emtrion DIMM-RZ System-on-Module Run Segger embOS RTOS or Linux with 10MB SRAM

Announced just about a year ago, Renesas RZ/A1 ARM Cortex A9 processor family can be used for human machine interface applications, and has the particularly to embed large amount of SRAM, especially the RZ/A1H series with 10 MB SRAM which allows the development of some applications without external RAM chip, lowering both board size and BoM cost. I’ve just come across a development kit dubbed “RZ/A1H Starter Kit”, and the just released Emtrion DIMM-RZ system-on-module both powered by Renesas RZ/A1H SoC. Renesas RZ/A1H Starter Kit+ (RSK) The development kit includes the mainboard, a 7″ TFT LCD (Optional), a detachable Colour LCD Board Pmod Compatible,a detachable AD Adjustment Shaft, Segger J-LINK Lite debugger, various connection cables, a power supply, a Quick Start Guide, and a DVD-ROM with documentation, ARM DS-5 IDE (with 32K code limit), KPIT GNU compiler for Cortex A9, Segger debugger drivers. and sample code. The mainboard has the […]

Renesas DevCon Extension Organizes Free One-Day Courses About IoT, Low Power, Sensors and More

I’ve just come across a YouTube video called Ultra-Low-Power Solutions for Wearable Technology and the ‘Internet of Things’ On Renesas channel. The video itself promotes Cymbet EnerChip Solid State Batteries and Kits, working together with Renesas MCUs, and the interesting part is that they’ll provide a free training session for the kit as part of Renesas Devcon Extension 2014. This is not a single event as you may think, but instead the company hosts one-day workshops in various cities in the US and Brazil covering various tracks all year long, as you can see in the simplified schedule below. RTOS & Middleware track is not available anymore, but you can still attend training sessions for Human Machine Interfaces, Low Power designs, the Internet of Things and Sensors. As an example, the following lectures are available for the Low Power track: Renesas Low-Power MCU Lineup (30 minutes) – Updated technology roadmap […]

Renesas RZ/A1 Cortex A9 Processors Feature Up to 10 MB On-chip RAM

Renesas Electronics has recently introduced the RZ/A1 group of ARM Cortex-A9 microprocessors (MPUs) for automotive, consumer and industrial applications requiring user interfaces with displays with a resolution up to 1280×768 (WXGA). The RZ/A1 series will come in three product groups: RZ/A1H, RZ/A1M and RZ/A1L with respectively 10MB, 5MB and 3MB on-chip RAM. These Renesas SoCs are an upgrade to SH7260 Series. Key Features (Included in A1H and A1M, but not always in A1L): Core – ARM Cortex A9 @ up to 400 MHz (with Jazelle and NEON) GPU – OpenVG-compliant Renesas graphics processor (2D graphics) Cache – 32-Kbyte L1 instruction cache, a 32-Kbyte L1 data cache, and a 128-Kbyte L2 cache. Built-in memory –  Up to 10-Mbyte large-capacity RAM (128 Kbytes are shared by the data-retention RAM) for A1H, 5MB for A1M, and 3MB for A1L External memory Up to 66.67 MHz bus Direct connection to SRAM, byte select SRAM, […]

Renesas R-Car H2 is an Octo Core big.LITTLE Processor for Your Car

Renesas announced a new automotive SoC called the R-Car H2 that features 4 Cortex-A15 cores together with 4 Cortex A7 cores (optional) in big.LITTLE configuration, as well as an Imagination PowerVR Series6 G6400 GPU. This SoC can optionally come with Renesas SH-4A, a real-time processing CPU core acting as a multimedia engine (MME) , and Renesas’ IMP-X4 core, a real-time image processing unit that enables developers to implement augmented reality application such as 360-degree camera views and image recognition. This Renesas processor is a multimedia power house, as it can handle 4x 1080p video en/decoding, including Blu-Ray support at 60 frames per second, as well as image/voice recognition and high-resolution 3D graphics with virtually no CPU usage. Here are R-Car H2’s specifications provided on Renesas website: Product number R8A7790x Power supply voltage 3.3/1.8 V (IO), 1.5/1.35 V (DDR3), 1.0 V (Core) CPU core ARM Cortex-A15 Quad ARM Cortex-A7 Quad (device […]

Renesas Unveils APE6 Octo Core big.LITTLE Processor

Samsung Exynos 5 Octa processor is getting some competition with the announcement of Renesas AP6 processor at MWC2013. This SoC comes with the same big.LITTLE configuration (4x Cortex A15, 4x Cortex A7), but with a PowerVR SGX Series 6 ‘Rogue’ GPU, which, I assume, should outperform PowerVR SGX544MP3 GPU used in Samsung SoC. R-Mobile APE6 could be the fastest mobile processor announced to date, and is currently showcased at Imagination Technologies booth at MWC 2013 running several OpenGL ES 3.0 applications, as well as a demonstration of Rightware’s Kanzi Studio, “a PC-based real-time WYSIWYG editor for designers and embedded engineers to create and customize embedded 3D user interface”. There’s very little information about the processor, so that’s basically all I have for now. But before I conclude, I’ll just drop a performance comparison chart between different PowerVR SGX series (source), since it’s the first mobile processor that I know of […]

Renesas Mobile Introduces MP6530 Quad Core ARM big.LITTLE Communication Processor

Renesas Mobile has recently announced the MP6530, an LTE communication SoC that targets mid- to high-end smartphones priced between $200 and $400. MP6530 features big.LITTLE technology with 2 ARM Cortex A15 clocked up to 2GHz, and 2 Cortex A7 cores up to 1Ghz, as well as an Imagination Technology PowerVR SGX544 GPU. Compared to Renesas Mobile MP5232 platform (Dual Cortex A9 + PowerVR GPU + Same TD-LTE Cat-4 Modem), GPU performance and memory performance have both been increased by 300 percent. MP6530 is manufactured using 28nm technology. Other key features of MP6530 SoC include: Dual-channel LPDDR3-standard interface with a bandwidth of 800-MB/s per channel. Multimedia capabilities Full HD primary display up to FHD@60Hz Simultaneous HDMI/MHL external display output (1080p30) Full HD WiFi Display Support for simultaneous 1080p30 video encoding and decoding Up to 20 MP digital SLR-like imaging support On-the-fly support with real-time face detection, stabilization, noise filtering to replace […]

Embedded Linux Conference 2013 Schedule

The Embedded Linux Conference (ELC 2013) will take place on February 20 – 22, 2013 at Park 55 Hotel in San Francisco, California. ELC consists of 3 days of presentations, tutorials and sessions. There will be over 50 sessions during those 3 days. I’ll highlight a few sessions that I find particularly interesting, and that did not get presented at ELCE 2012 (AFAICR). February 20 11:00 – Anatomy of the arm-soc git tree by Olof Johansson, Google We are now two years into the new maintainer model for ARM platforms, and we have settled down into a workflow that maintainers have adjusted well to. Still, when new platforms arrive, or when maintainer ship changes hands, there’s sometimes a bit of ramp-up in getting used to how we organize our git tree and how we prefer to see code submitted to fit that model. This presentation will give an overview of […]

ASUS Tinker board 3N