virtual reality

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Cadence Neo NPU IP scales from 8 GOPS to 80 TOPS

Cadence Neo NPU IP scales from 8 GOPS to 80 TOPS

Cadence Neo NPU

Cadence Neo NPU (Neural Processing Unit) IP delivers 8 GOPS to 80 TOPS in single core configuration and can be scaled to multicore configuration for hundreds of TOPS. The company says the Neo NPUs deliver high AI performance and energy efficiency for optimal PPA (Power, Performance, Area) and cost points for next-generation AI SoCs for intelligent sensors, IoT, audio/vision, hearables/wearables, mobile vision/voice AI, AR/VR and ADAS. Some highlights of the new Neo NPU IP include: Scalability – Single-core solution is scalable from 8 GOPS to 80 TOPS, with further extension to hundreds of TOPS with multicore Supports 256 to 32K MACs per cycle to allow SoC architects to meet power, performance, and area (PPA) tradeoffs Works with DSPs, general-purpose microcontrollers, and application processors Support for Int4, Int8, Int16, and FP16 data types for CNN, RNN and transformer-based networks. Up to 20x higher performance than the first-generation Cadence AI IP, with […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 1 Comment on Andes launches AX45MPV RISC-V CPU core with Vector Extension 1.0

Andes launches AX45MPV RISC-V CPU core with Vector Extension 1.0

AX45MPV RISC core vector extension

Andes Technology has recently announced the general availability of the AndesCore AX45MPV RISC-V CPU which builds upon the AX45MP multicore processor and adds RISC-V Vector Extension 1.0. Equipped with RISC-V vector processing and parallel execution capability, the new RISC-V CPU core targets SoCs processing large amounts of data for applications such as ADAS, AI inference and training, AR/VR, multimedia, robotics, and signal processing. AX45MPV key features and specifications: 64-bit in-order dual-issue 8-stage CPU core with up to 1024-bit Vector Processing Unit (VPU) – compliant with RISC-V V-extension (RVV) 1.0 + custom extensions Supports clusters of up to 8 cores L2 cache and coherence support High bandwidth vector local memory (HVM) AndeStar V5 Instruction Set Architecture (ISA) Compliant with RISC-V GCBPV extensions Andes performance extension Andes CoDense extension for further compaction of code size Separately licensable Andes Custom Extension (ACE) for customized scalar and vector instruction 64-bit architecture for memory space […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 7 Comments on LiFi 802.11bb standard uses light for in-room data transmission up to 224GB/s

LiFi 802.11bb standard uses light for in-room data transmission up to 224GB/s

LiFi 802.11bb

The 802.11bb WiFi-like standard, also called LiFi, was ratified in June 2023. It enables data transmission up to 224GB/s at a few meters range within a room using light instead of RF signals used in most other wireless standards. The technology has been worked on for many years, and we first covered (a version of) LiFi in 2014 that was still part of the IEEE 802.15 standard with speeds up to 1 Gbps. But the Light Communications 802.11bb Task Group was only formed in 2018 chaired by pureLiFi and supported by Fraunhofer HHI, and led to be ratification of the IEEE 802.11bb standard last month. In a typical LiFi setup, you’d have a LiFi-capable router connected to your local network and the Internet, a LiFi-enabled light bulb on a ceiling, and one or more LiFi receivers. From the end-user perspective, it would work like accessing a WiFi access point. We’re […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on Andes unveils AndesCore AX65 Out-of-Order RISC-V core for compute intensive applications

Andes unveils AndesCore AX65 Out-of-Order RISC-V core for compute intensive applications

AndesCore AX60

Andes Technology has unveiled the high-end AndesCore AX60 series out-of-order 64-bit RISC-V processors at the Linley Fall Processor Conference 2022 with the new cores designed for compute-intensive applications such as advanced driver-assistance systems (ADAS), artificial intelligence, augmented/virtual reality, datacenter accelerators, 5G infrastructure, high-speed networking, and enterprise storage. AndesCore AX65 is the first member of the family and supports RISC-V scalar cryptography extension and bit manipulation extension. It is a 4-way superscalar core with Out-of-Order (OoO) execution in a 13-stage pipeline and can fetch 4 to 8 instructions per cycle. The company further explains the AX65 core then decodes, renames, and dispatches up to 4 instructions into 8 execution units, including 4 integer units, 2 full load/store units, and 2 floating-point units. The AX65’s memory subsystem also includes split 2-level TLBs (translation lookaside buffers) with up to 64 outstanding load/store instructions. Up to eight AX65 cores (or should that then be […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 7 Comments on SiFive P670 and P470 RISC-V processors feature RISC-V Vector Extensions

SiFive P670 and P470 RISC-V processors feature RISC-V Vector Extensions

SiFive Performance RISC-V processors Roadmap

SiFive has announced two new RISC-V Performance cores with the P670 and P470 processors with RISC-V Vector Extension for AI/ML, media and sensor processing, and designed for high volume applications such as wearables, smart home, industrial automation, AR/VR, and other consumer devices. The P670 is comparable to the Cortex-A78, and the P470 is comparable to the Cortex-A55. Both support the standardized RISC-V RVA22 profile for better OS compatibility and implement RISC-V Vector v1.0 and Vector Cryptography extensions. The SiFive Performance P470 and P670 share the following features: Full RISC-V RVA22 profile compliance Full, Out-of-Order, RISC-V Vector implementation, based on the ratified RISC-V Vector v1.0 Specification RISC-V Vector Cryptography extensions SiFive WorldGuard system security Support for virtualization, including a separate IOMMU for accelerating virtualized device IO Advanced Interrupt Architecture (AIA) compliant interrupt controller with better support for Message Signal Interrupts (MSI) and virtualization Enhanced scalability with fully coherent multi-core, multi-cluster, with […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 8 Comments on Think Silicon NEOX RISC-V GPU offers 3D graphics or AI acceleration

Think Silicon NEOX RISC-V GPU offers 3D graphics or AI acceleration

Think Silicon NEOX RISC-V GPU

Think Silicon NEOX GPU family with models optimized for graphics (NEOX|G) or artificial intelligence (NEOX|A) is based on the RISC-V RV64C ISA instruction set with adaptive NoC, and offers up to 64 cores delivering up to 409.6 GFLOPS at 800MHz with support for FP16, FP32 and optionally FP64 and SIMD instructions. The NEOX GPUs can be integrated into microcontrollers, crossover processors, and even more powerful application processors, and target AI, IoT/Edge, and media processing in consumer and industrial devices. Each shader of the GPU is a programmable 64-bit RISC-V (RV64GC) core running a real-time operating system (RTOS) and the GPU is supported by lightweight graphics and machine learning frameworks. The multi-threaded GPU system can be customized for graphics, machine learning, vision/video processing, and general-purpose compute (GPGPU) workloads. The solution is meant to be integrated into 32-bit SoCs designed for smartwatches, augmented reality (AR) eyewear, video surveillance, and smart display terminals […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Qualcomm announces FastConnect 7800 WiFi 7 & Bluetooth 5.3 solution

Qualcomm announces FastConnect 7800 WiFi 7 & Bluetooth 5.3 solution

Qualcomm FastConnect 7800 WiFi 7 chip highlights

Qualcomm has just announced the FastConnect 7800 WiFi 7 and Bluetooth 5.3 subsystem for smartphones, laptops, and virtual reality headsets promising peak speeds of 5.8 Gbps as well as sub-2 millisecond latency. We first detailed some of WiFi 7 features such as up to 40 Gbps link, and real-time capabilities when MediaTek showcased its future 802.11be compliant Filogic processor to customers, so it should be no surprise that Qualcomm had been working on its own solution, and announced it at Mobile World Congress 2022. Qualcomm FastConnect 7800 (WCN785x-1, WCN785x-5) specifications: Wi-Fi Standards – Wi-Fi 7 (802.11be), Wi-Fi 6E, Wi-Fi 6 (802.11ax), 802.11ac Wave 2, 802.11a/b/g, 802.11n Spectral Bands: 2.4GHz, 5GHz, 6GHz Peak QAM: 4K QAM Peak speed: 5.8Gbps or 4.3Gbps where the 6GHz spectrum is not available Features 4-stream Dual-band simultaneous (DBS) extended into the High Bands Multi-Link Operation (MLO) using 320 MHz (Single channel or 160 + 160) 8×8 […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on TurboX C865 CPU module and 96Boards devkit feature Qualcomm QCS8250 IoT processor

TurboX C865 CPU module and 96Boards devkit feature Qualcomm QCS8250 IoT processor

TurboX C865 96Boards development kit

Thundercomm has unveiled another Qualcomm IoT module and development kit with the TurboX C865 SOM and development kit based on Qualcomm QCS8250, based on Snapdragon 865 but for IoT applications, which follows our coverage of the company’s TurboX CM2290 and C2290 SoM & devkit based on Qualcomm QCM2290/QCS2290 quad-core Cortex-A53 processor several days ago. The new TurboX C865 system-on-module is for higher-end IoT applications with a faster processor combines with 8GB LPDDR5 RAM, and 128G UFS storage, WiFI 6 & Bluetooth 5.1 connectivity, and the company also offers a 96Boards compliant development kit to help with the development of more advanced IoT products running Android 10. TurboX C865 SoM Specifications: SoC – Qualcomm QCS8250 octa-core Kryo 585 processor with Adreno 650 GPU, Adreno 665 VPU, Adreno 995 DPU, Hexagon DSP with quad HVX, Spectra 480 ISP; 15 TOPS AI processing power System Memory – 8GB LPDDR5 (PoP) Storage – 128G […]

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