Linux 5.19 Release – Main changes, Arm, RISC-V and MIPS architectures

Linux 5.19 release arm risc-v mips

Linus Torvalds has just announced the release of Linux 5.19. It should be the last 5.xx version, with Linux 6.0 coming for the next cycle: So here we are, one week late, and 5.19 is tagged and pushed out. The full shortlog (just from rc8, obviously not all of 5.19) is below, but I can happily report that there is nothing really interesting in there. A lot of random small stuff. In the diffstat, the loongarch updates stand out, as does another batch of the networking sysctl READ_ONCE() annotations to make some of the data race checker code happy. Other than that it’s really just a mixed bag of various odds and ends. On a personal note, the most interesting part here is that I did the release (and am writing this) on an arm64 laptop. It’s something I’ve been waiting for for a _loong_ time, and it’s finally reality, […]

Embedded World 2022 – June 21-23 – Virtual Schedule

Embedded World 2020 was a lonely affair with many companies canceling attendance due to COVID-19, and Embedded World 2021 took place online only. But Embedded World is back to Nuremberg, Germany in 2022 albeit with the event moved from the traditional month of February to June 21-23. Embedded systems companies and those that service them will showcase their latest solution at their respective booths, and there will be a conference with talks and classes during the three-day event. The programme is up, so I made my own little Embedded World 2022 virtual schedule as there may be a few things to learn, even though I won’t be attending. Tuesday, June 21, 2022 10:00 – 13:00 – Rust, a Safe Language for Low-level Programming Rust is a relatively new language in the area of systems and low-level programming. Its main goals are performance, correctness, safety, and productivity. While still ~70% of […]

Arm SystemReady SR-certified Ampere Altra Developer Platform launched for $3,999

ADLINK has just announced the availability of the Arm SystemReady SR-certified Ampere Altra Developer Platform equipped with the company’s COM-HPC Ampere Altra module with 32 to 80 64-bit Arm Neoverse N1 cores, 32GB to 128GB RAM. An adaptation to the earlier AVA Developer Platform expected to sell for $5,450, the Ampere Altra Developer Platform got a price cut to $3,999 at launch for a system with a 32-core processor, and 32GB DDR4. The system targets software developers wanting to build cloud-to-edge applications using standardized Arm hardware. Ampere Altra Developer Platform specifications: SoM – COM-HPC Ampere Altra module with Ampere Altra 32 to 80-core 64-bit Arm Neoverse N1 processor up to 1.7/2.2/2.6 GHz (32/64/80 cores, TPD: 60W to 175W), 32 GB to 128GB DDR4 ECC memory Storage – 128 GB NVMe M.2 SSD Mainboard – COM-HPC Server Base carrier board Video – VGA port Audio – 3.5mm audio jack Networking 1x […]

Android 13 virtualization lets Pixel 6 run Windows 11, Linux distributions

The first Android 13 developer preview may have felt a bit underwhelming, but there’s a hidden gem with full virtualization possible on hardware such as the Google Pixel 6 smartphone. What that means is that it is now possible to run virtually any operating system including Windows 11, Linux distributions such as Ubuntu or Arch Linux Arm on the Google Tensor-powered phone, and do so at near-native speed. Android & web developer “kdrag0n” tested several Linux distributions compiled for Aarch64 on the Pixel 6 with Ubuntu 21.10, Arch Linux Arm, Void Linux, and Alpine Linux using “the KVM hypervisor on Pixel 6 + Android 13 DP1”. He/she further explains: As far as I can tell, we can pretty much get full EL2 on production devices now. Protected KVM is optional and can be enabled on a per-VM basis, but for non-protected VMs, it looks like full KVM functionality is available. […]

StarFive Dubhe 64-bit RISC-V core to be found in 12nm, 2 GHz processors

StarFive has just announced customers’ delivery of the 64-bit RISC-V Dubhe core based on RV64GC ISA plus bit manipulation, user-level interrupts, as well as the latest Vector 1.0 (V) and Hypervisor (H) instructions. StarFive Dubhe can be clocked up to 2 GHz on a 12nm TSMC process node, and the company also released performance numbers with a SPECint2006 score of 8.9/GHz, a Dhrystone score of 6.6 DMIPS/MHz, and a CoreMark score of 7.6/MHz. A third-party source told CNX Software it should be equivalent to the SiFive Performance P550 RISC-V core announced last summer, itself comparable to Cortex-A75. StarFive Dubhe highlights: Typical frequency – 2.0 GHz @ TSMC 12nm “Industry-leading” Power and Area Efficiency (TSMC 12nm) RISC-V Vector Extension Data types: floating point, fixed point and integer VLEN=128-1024bits ALU & data path width=128 or 256 bits Full vector register grouping (LMUL) support RISC-V Virtualization Extension Pre-integrated Multi-Core with Memory Coherency Support […]

Cortex-M55 based Arm Virtual Hardware is now available in AWS Cloud

The Arm DevSummit 2021 is taking place on October 19-21, and the first announcements from Arm are related to IoT with “Arm Total Solutions for IoT delivering a full-stack solution to significantly accelerate IoT product development and improve product ROI”, “Project Centauri” aiming to achieve for an extensive Arm Cortex-M software ecosystem in the way that Project Cassini does for the Cortex-A ecosystem, starting with support for PSA Certified and Open-CMSIS-CDI cloud-to-device specification, and Arm Virtual Hardware based on Corstone-300 IoT platform with a Cortex-M55 MCU core and an Ethos-U55 microNPU accessible from Amazon Web Services. The first two are quite abstract right now, and more information may become available in the future, but the Arm Virtual Hardware is available now from AWS as a public beta, with 100 hours of free AWS EC2 CPU credits for the first 1,000 qualified users. The virtual hardware does not emulate only the […]

Linux 5.12 – Main Changes, Arm, MIPS and RISC-V Architectures

Linux 5.12 release was expected last Sunday, but Linus Torvalds decided to release one more release candidate, namely Linux 5.12-RC8, to “make sure things are all settled down“, so the latest Linux kernel is now expected this weekend.  Tihs should not yield any significant changes, so we can check what’s new in Linux 5.12, notably with regards to Arm, MIPS, and RISC-V architectures often used in SoC’s found in embedded systems. Around two months ago, the release of Linux 5.11 added support for Intel’s software guard extensions (SGX) and Platform Monitoring Technology (PMT), AMD “Van Gogh” and “Dimgrey cavefish” graphics processors, MIPI I3C host controller interfaces, and much more. Some interesting changes in Linux 5.12 include: Added support for ACRN hypervisor designed for IoT & embedded devices Added support for Playstation DualSense & Nintendo 64 game controllers, as well as Nintendo 64 data cartridges Dynamic thermal power management via a […]

Congatec Unveils Atom x6000E Elkhart Lake Powered Pico-ITX SBC, Qseven, SMARC, COM Express Modules

With the announcement of Intel Elkhart Lake IoT-optimized processors, we should expect embedded systems companies to unveil their own Atom x6000E and Celeron/Pentium Elkhart Lake powered products, and one of the first to do so is Congatec with the introduction of four different Elkhart Lake computers-on-module (CoM) following Qseven, SMARC, and COM Express standards, as well as a Pico-ITX SBC. conga-PA7 Atom x6000E SBC (with Celeron/Pentium J optional) Detailed specifications: SoC –  Choice of eight different Elkhart Lake processors from the 6W Atom x6211E dual-core processor to the 10W Intel Pentium J6425 quad-core processor up to 3.0 GHz, all with 10th Gen Intel UHD graphics System Memory – Up to 16GB quad-channel onboard LPDDR4x Storage 32GB or 64GB UFS 2.0 flash (optional up to 512GB) M.2 SATA/PCIe SSD support (see expansion) 32 MB serial flash for AMI Aptio UEFI firmware Video DisplayPort DP++ video output up to 4Kp60 1x USB-C […]