Last year, MIPS announced Aptiv Cores, but since then, the company has been bought by Imagination Technologies, and they’ve recently announced updates to the family, as well as new MIPS Series5 ‘Warrior’ CPU cores during Imagination Summit in Asia.
Before I write about the update to Aptiv cores, let me remind you of the 3 Aptiv families:
- proAptiv – High performance cores (3.5DMIPS/Mhz) to be used in SoC for smartphone, tablets, …. 1 to 6 cores. Roughly equivalent to ARM Cortex A15.
- interAptiv – Medium performance core (1.7DMIPS/MHz) for mainstream STB, digital cameras, mid-range smartphones. 1 to 4 cores. Equivalent to ARM Cortex A5
- microAptiv – Low power MCU and MPU cores
Imagination has added a small-footprint single-core version to the interAptiv family without the extra logic associated with multi-core coherency and L2 cache controller, as well as a floating point version to the microAptiv family for applications such as electric metering and motor control.
Most interestingly, Imagination also announced they will introduce MIPS Series5 ‘Warrior’ cores later this year. They will include 32-bit and 64-bit variants that like the Aptiv cores, will come with high-performance, mid-range and entry-level/microcontroller CPUs. Note that contrary to ARM, 64-bit MIPS core are not exactly new, as the first MIPS64 core became available in 1991, and Imaginations claims tools are already built for 64-Bit MIPS architecture.
The key ‘Warrior’ features include:
- Hardware-assisted virtualization (VZ)
- MIPS hardware multi-threading technology
- Imagination security framework for applications including content protection on mobile devices, secure networking protocols and payment services
- MIPS SIMD architecture (MSA) built on instructions designed to be easily supported within high-level languages such as C or OpenCL.
That’s about all we know at this time. A few more details about the MIPS Series5 features are explained on Imagination’s blog.