Samsung LPCAMM integrates LPDDR RAM on removable modules

Samsung has unveiled a new type of removable memory module called the LPCAMM (Low Power Compression Attached Memory Module) with LPDDR designed for PCs and laptops, and the company expects them to eventually be used in servers found in data centers. I would also not be surprised to find them in embedded systems in the future, for example in an updated COM Express standard.

Laptops typically come with either low-power DDR (LPDDR) soldered to the motherboard or SO-DIMM modules with DDR memory chips, but there weren’t any removable modules with low-power memory so far, and Samsung LPCAMM changes that.

Samsung LPCAMM

The new LPCAMM module will initially be fitted with LPDDR5X chips and deliver a 50% performance boost (up to 7500 MT/s), improve power efficiency by 70%, and reduce the mounting area by 60% (78 x 23mm) compared to SO-DIMM modules

A main factor in reducing the area required is that two SO-DIMM modules are required for dual-channel memory, but a single LPCAMM module would be needed on a motherboard that supports the new memory modules thanks notably to a 128-bit memory bus.

LPCAMM module vs SO-DIMM module

Anandtech obtained two diagrams of the pads from Intel that illustrate the relationship between the positioning of the LPDDR5X memory modules and the signal pads below them. This is important as LPDDR chips need short traces to the host memory controller, and that’s why they can not be used on traditional SO-DIMM modules.

LPCAMM Bottom Pads LPCAMM Top Pads

So that means low-power high-performance removable LPDDR modules will soon become available to laptops and other compatible hardware platforms. We’ll still need to be patient as the first LPCAMM removable memory modules with LPDDR5X memory are expected in 2024 with capacities of up to 128 GB, and adoption of the new memory modules, if they ever gain traction, may take a while. A few more details may also be found in the press release.

Via Liliputing

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16 Comments
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Guillaume
Guillaume
8 months ago

Typo on the expected year of availability.

This new kind of memory module sounds greats. Wait and see for an adoption for SBC too.

Anonymous
Anonymous
8 months ago

Then it won’t be an SBC anymore, haha.

But seriously, I think it will be a factor for somewhat larger mini PCs rather than SBCs.

back2future
back2future
7 months ago

[ added to board sizes (almost appears easier implementing SoCs on memory modules(?) ) and idling/peak power requirements (power supply ~ATX/Flex-ATX/SFX or USB-pdX.x or single voltage supply connector), most significant difference will be, if it’s an aarch64, risc-V or x86_64 instruction set architecture, with ‘AI’-PU hw arriving on x64 ]

Willy
8 months ago

I think it can replace SODIMMs in laptops but will not replace soldered DRAM in laptops because this is done on purpose for market segmenting, allowing to sell different models at a larger price difference than the difference of the DRAM prices. Regarding SBC, from what we’ve seen over time, few SBCs are able to support multiple RAM configs because these are often hard-coded into the SPL, which is often specific to the number of channels, the size and the frequency. Some rare boards are able to read the SPD info and adapt, but these should be seen as exceptions.… Read more »

Upgrade pi-top [3]
Upgrade pi-top [3]
8 months ago

Do you have some examples of SBCs that read and adapt to the SPD info? Sounds intriguing

Willy
8 months ago

The mcbin from SolidRun does for example.

TLS
TLS
8 months ago

You’re aware that this doesn’t differ at all from a standard DDR5 DIMM in terms of components, right? Also, ALL computers can read the SPD info, otherwise your RAM wouldn’t be working. However, not all allow you to manually change it.

Stefan Brüns
Stefan Brüns
8 months ago

Well, no. Having implemented memory training for DDR2/DDR3 on Freescale platforms, I can tell you there is no SPD info.
On embedded platforms (i.e. with soldered down bare DDRx RAM chips) all the parameters derived from the memory datasheets and PCB trace lengths are directly supplied from the firmware to the SoCs memory controller.

TLS
TLS
7 months ago

You used DIMMs with that? Bare chips obviously has no SPD data, since there’s no SPD chip…

Willy
8 months ago

You mean “all PCs equipped with removable DIMMs” I presume ?

TLS
TLS
7 months ago

Yes, my bad.

Anonymous
Anonymous
8 months ago

It’s not as thin/compact as soldered memory, so it was never going to fully replace soldered, only coexist with it.

I’ll be more than happy if the amount of laptops offering user-upgradeable RAM increases, since many cheap ones don’t offer a SODIMM slot anymore. I don’t think this Samsung form factor is standard though, so there could still be obstacles ahead.

fossxplorer
fossxplorer
8 months ago

Very interesting.
Perhaps Samsung was developing this as a competitor or as an alternative to Dell’s server memory module that was revealed last year or so?

back2future
back2future
7 months ago

Interesting approach for upgrading long term hardware (in yrs coming). Only me thinking it’s competing with nvme standards/m.2 connector (slowly evolving to PCIe3) for low cost boards (would have been different (was requested with 4GB limits before/on 32/64bit (memory addresses aarch64 32-48bit, data bus transfer width 64bit) transition), if one could upgrade nowadays boards with additional (parallel to soldered) RAM with increasing software requirements). Depending with real implementation on hardware and standardization, success will prove me wrong

Anonymous
Anonymous
7 months ago

By competing, you mean competing for board area or something? Like it would need to go on larger boards such as Pico-ITX or Mini-ITX?

back2future
back2future
7 months ago

Since with transition to LPDDR5 me thinking it’s going to be about (cost/)prices, and there are/would be solutions for secondary/stacked pcb level mounting, vertical (height of modules?) or bent/split/3d main pcb with even vertical (socketed) SoCs (?). Think about a ‘wave’ board with SoC’s on top of a wave and for a vertical memory connectors on backside within short distance to the SoC. Peripherals getting area with distance from mainboard (?, and we don’t talk about low cost with this, probably)

Khadas VIM4 SBC