Posted on - 2 Comments on Toradex Colibri iMX8X SoM Features NXP i.MX 8X Dual / Quad Arm Cortex-A35 Processor

Toradex Colibri iMX8X SoM Features NXP i.MX 8X Dual / Quad Arm Cortex-A35 Processor

Toradex Colibri imx-8x som

Designed for infotainment and dashboard in automotive applications, industrial control, robotics, healthcare, mobile payments, handheld devices, and more, NXP i.MX 8X Arm Cortex-A35 processor was first spotted in 2016, before being formally announced in March 2017. But it took quite longer to see actual products launched, and several vendors announced i.MX 8X modules in the last week while NXP also released documentation. One of them is Toradex with their Colibri iMX8X system-on-module with up to 2GB LPDDR4 memory, 8GB flash, a built-in 802.11ac 2×2 MIMO WiFi + Bluetooth 5 module, dual channel LVDS, MIPI DSI display interface, a quad-lane MIPI CSI-2 camera interface, etc… Toradex Colibri iMX8X specifications: SoC (one of the following options) NXP i.MX 8QuadXPlus quad core Cortex-A35 processor @ up to 1.2GHz, Arm Cortex-M4 MCU @ up to 266MHz, HiFi4 DSP, Vivante GC7000Lite performance optimized GPU, 4K video support NXP i.MX 8DualXPlus dual core Cortex-A35 processor @ up to 1.2GHz, Arm Cortex-M4 MCU @ up to 266MHz, …

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Posted on - 5 Comments on Linux 4.19 Release – Main Changes, Arm and MIPS Architectures

Linux 4.19 Release – Main Changes, Arm and MIPS Architectures

Linux 4.19 Changelog

With Linus Torvalds taking a leave from the Linux kernel project, Greg Kroah-Hartman was the one to release Linux 4.19 last Sunday: Hi everyone! It’s been a long strange journey for this kernel release… While it was not the largest kernel release every by number of commits, it was larger than the last 3 releases, which is a non-trivial thing to do. After the original -rc1 bumps, things settled down on the code side and it looks like stuff came nicely together to make a solid kernel for everyone to use for a while. And given that this is going to be one of the “Long Term” kernels I end up maintaining for a few years, that’s good news for everyone. A small trickle of good bugfixes came in this week, showing that waiting an extra week was a wise choice. However odds are that linux-next is just bursting so the next -rc1 merge window is going to be bigger …

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Posted on - No Comments on NXP Unveils i.MX RT600 Series Arm Cortex-M33 + Audio DSP Crossover Processor

NXP Unveils i.MX RT600 Series Arm Cortex-M33 + Audio DSP Crossover Processor

NXP IMX RT600

A little over a year ago, NXP introduces their first crossover processor that blurs the line between real-time capabilities of microcontrollers and higher performance of application processors with NXP i.MX RT1050 processor equipped with a Cortex-M7 core clocked at up to 700 MHz. The company has now announced another model with lower power consumption. NXP i.MX RT600 series comes with a Cortex M33 core clocked at up to 300MHz, a Cadence Tensillica HiFi 4 audio DSP, and up to 4.5MB shared SRAM. Main features of NXP i.MX RT685 crossover processor: CPU Core – Arm  Cortex-M33 up to 300 MHz DSP – Tensilica Hi-Fi 4 up to 600 MHz Memory Up to 4.5 MB on-chip RAM 128KB DSP TCM, 128 KB DSP Cache Storage 96KB ROM on-chip 2x SDIO with 1x supporting eMMC5.0 w/ HS400 1x Octal/Quad SPI up to 100MB/s Peripherals 2x DMA Engines with 35 channels each 1x USB high speed host/device with PHY 1x SPI  up to 50 …

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Posted on - 2 Comments on Linux 4.18 Release – Main Changes, Arm and MIPS Architecture

Linux 4.18 Release – Main Changes, Arm and MIPS Architecture

Linux Changelog 4.18

Linus Torvalds has just announced the release of Linux 4.18: One week late(r) and here we are – 4.18 is out there. It was a very calm week, and arguably I could just have released on schedule last week, but we did have some minor updates. Mostly networking, but some vfs race fixes (mentioned in the rc8 announment as “pending”) and a couple of driver fixes (scsi, networking, i2c). Some other minor random things (arm crypto fix, parisc memory ordering fix). Shortlog appended for the (few) details. Some of these I was almost ready to just delay to until the next merge window, but they were marked for stable anyway, so it would just have caused more backporting. The vfs fixes are for old races that  are really hard to hit (which is obviously why they are old and weren’t noticed earlier). Some of them _have_ been seen in real life, some of them probably need explicit help to ever …

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Posted on - No Comments on Congatec conga-SMX8 is a SMARC 2.0 Module Based on NXP i.MX8 Processor

Congatec conga-SMX8 is a SMARC 2.0 Module Based on NXP i.MX8 Processor

We’ve already seen some SMARC 2.0 SoM based on NXP i.MX8 processor with for instance, i.MX 8M based SECO SM-C12. We now have at more choice thanks to Congatec which just announced  conga-SMX8, the company’s first SMARC 2.0 Computer-on-Module based on the NXP i.MX8 Arm Cortex-A53/A72 processor. conga-SMX8 SoM specifications: SoC (one or the other) NXP i.MX8 Quad Max with 2x Arm Cortex-A72, 4x Arm Cortex-A53, 2x Arm Cortex-M4F, 2x Vivante GC7000XSVX GPU NXP i.MX8 QuadPlus with 1x Arm Cortex-A72, 4x Arm Cortex-A53, 2x Arm Cortex-M4F, 2x Vivante GC7000Lite/XSVX GPU NXP i.MX8 DualMax with 2x Arm Cortex-A72, 2x Arm Cortex-M4F, 2x Vivante GC7000Lite/XSVX GPU System Memory – Up to 8 GB LPDDR4 memory | 3200 MT/s Storage – Up to 64GB eMMC flash, micro SD 3.0 card socket Other On-Module Chips 2x Gigabit Ethernet transceiver Optional M.2 1216 WiFi module (soldered down) USB hub 314-pin MXM Edge connector with Storage – 1x SATA III Networking – 2x Gbit Ethernet Video …

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Posted on - 3 Comments on Google Unveils Edge TPU Low Power Machine Learning Chip, AIY Edge TPU Development Board and Accelerator

Google Unveils Edge TPU Low Power Machine Learning Chip, AIY Edge TPU Development Board and Accelerator

AIY Edge TPU Dev Board

Google introduced artificial intelligence and machine learning concepts to hundreds of thousands of people with their AIY projects kit such as the AIY Voice Kit with voice recognition and the AIY Vision Kit for computer vision applications. The company has now gone further by unveiling Edge TPU, its own  purpose-built ASIC chip designed to run TensorFlow Lite ML models at the edge, as well as corresponding AIY Edge TPU development board, and AIY Edge TPU accelerator USB stick to add to any USB compatible hardware. Google Edge TPU (Tensor Processing Unit) & Cloud IoT Edge Software Edge TPU is a tiny chip for machine learning (ML) optimized for performance-per-watt and performance-per-dollar.  It can either accelerate ML inferencing on device, or can pair with Google Cloud to create a full cloud-to-edge ML stack. In either case, local processing reduces latency, remove the needs for a persistent network connection, increases privacy, and allows for higher performance using less power. The chip will …

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Posted on - No Comments on SECO Q7-C25 / Q7-C26 QSeven SoMs Feature NXP i.MX 8M / i.MX 8Quad Processor

SECO Q7-C25 / Q7-C26 QSeven SoMs Feature NXP i.MX 8M / i.MX 8Quad Processor

We’ve previously covered SECO’s SM-C12 SMARC 2.0 i.MX 8M system-on-module, but the company has just unveiled two new module families which are compliant with Qseven – another SoM standard – and powered by NXP i.MX 8M dual/quad core Cortex A53 processor and NXP i.MX 8Quad Cortex A53 or A72/A53 SoC with respectively Q7-C25 and Q7-C26 systems-on-module. SECO Qseven i.MX 8/8M System-on-Module Q7-C25 / Q7-C26 specifications: SoC Q7-C25 (one or the other) NXP i.MX 8M Quad 4x Cortex-A53 cores up to 1.5GHz, 1x Cortex-M4 F real-time core, Vivante GC7000Lite GPU, VPU NXP i.MX 8M Dual 2x Cortex-A53 cores up to 1.5GHz, 1x Cortex-M4 F real-time core, Vivante GC7000Lite GPU, VPU NXP i.MX 8M QuadLite 4x Cortex-A53 cores up to 1.5GHz, , 1x Cortex-M4 F real-time core, Vivante GC7000Lite GPU no VPU Q7-C26 (one or the other) NXP i.MX 8QuadMax 2x Cortex-A72 cores + 4x Cortex-A53 cores + 2x Cortex-M4F cores, 2x Vivante GC7000XSVX GPUs NXP i.MX 8QuadPlus 1x Cortex-A72 cores + 4x …

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Posted on - 10 Comments on Visual Studio 2017 with an Embedded Linux Arm Device

Visual Studio 2017 with an Embedded Linux Arm Device

This is a non-sponsored guest post written by Marc Goodner: Principal Program Manager, Microsoft, and Jeremias Cordoba: Innovation Engineer, Toradex. Today many embedded devices run some flavor of Linux as their primary operating system. This poses a challenge to developers who run Windows on their development machine. This article explains a new way to use the latest Visual Studio for C++ development on an embedded Arm Devices from a Windows Host PC using containers for the build environment. The device we are deploying to is from the Toradex Colibri Family of System on Modules using the NXP i.MX 6ULL SoC, which features an Arm Cortex A-7. As a demo project we will connect a Bluetooth Sensor with the Toradex Colibri Module. Please note that Visual Studio support for this case is in an early state, you will see improvements from Microsoft and Toradex in the coming months. Prerequisites Colibri i.MX 6ULL with Wi-Fi/BT and an Aster Carrier Board TI SensorTag (Bluetooth low energy) …

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