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March 27, 2026 by Debashis Das - 8 Comments

Microchip SAM9X75 Hybrid automotive MCU – Surprisingly ARM9 is still a thing in 2026

When Microchip launched the SAM9X60 in 2020, we were surprised to see a new SoC based on a legacy ARM926EJ-S core. But we were even more surprised to see Microchip doubling down with the SAM9X75, a hybrid automotive-qualified (AEC-Q100 Grade 2) System-in-Package (SiP) with the same classic ARM9 core and integrated DDR2 or DDR3L memory. The first part will be the SAM9X75D5M SiP with 512MB on-chip DDR2 RAM, but the company also designed the SAM9X75D1G with 1 Gbit DDR3L and the SAM9X75D2G featuring 2 Gbit DDR3L. The SAM9X75 hybrid ARM9 MCU targets developers who need an MCU-like development environment, while benefiting from higher processing and display capabilities of microprocessors for automotive and e-mobility HMI applications. Microchip SAM9X75D5M specifications: CPU subsystem Core – ARM926EJ-S running up to 800 MHz (significant increase from older 400-600MHz variants) 32 KB data cache, 32 KB instruction cache, and Memory Management Unit (MMU). Memory 512 Mbit […]

March 10, 2026 by Jean-Luc Aufranc (CNXSoft) - No Comments

NXP i.MX 93W wireless MPU SiP pairs dual-core Arm Cortex-A55 processor with NXP iW610 WiFi 6, Bluetooth LE, and 805.15.4 radio

NXP i.MX 93W is the company’s first integrated wireless MPU System-in-Package (SiP) and combines a dual-core Cortex-A55 processor (NXP i.MX 93) with an iW610 WiFi 6, Bluetooth LE, and 802.15.4 tri-radio into a single chip. The 14.2 x 12 mm package also includes all the external radio components needed for wireless connectivity, replacing up to 60 discrete components on the PCB. NXP says it reduces the PCB area, simplifies PCB design and regulatory approval, and speeds up time-to-market. NXP i.MX 93W specifications: CPU Dual-Core Arm Cortex-A55 at up to 1.7 GHz Arm Cortex-M33 core at 250 MHz for real-time control GPU – 2D graphics accelerator AI accelerator – Arm Ethos-U65 microNPU Memory I/F – Up to 3.7GT/s 16-bit LPDDR4/LPDDR4X with inline ECC Storage I/F – 2x SD 3.0/SDIO 3.0/eMMC 5.1 Display Interfaces MIPI DSI up to 1080p60 LVDS up to 720p60 24-bit parallel RGB Camera Interface – 2-lane MIPI CSI up […]

October 1, 2025September 30, 2025 by Debashis Das - 1 Comment

ARIES MSRZG3E OSM-compliant SiP with Renesas RZ/G3E MPU targets industrial HMI and Edge AI

ARIES Embedded MSRZG3E OSM compliant SiP

ARIES Embedded MSRZG3E is an OSM-compliant system-in-package (SiP) built around the Renesas RZ/G3E MPU, designed for HMI, industrial, medical, and edge AI applications. The Renesas RZ/G3E SoC integrates a quad-core Arm Cortex-A55 CPU, a Cortex-M33 real-time core, and an Ethos-U55 NPU delivering up to 512 GOPS for AI power. Other features include PCIe Gen3, USB 3.2, dual Gigabit LAN, plus CAN FD, UART, I2C, SPI, and ADC. Multimedia support includes dual displays, MIPI-CSI camera input, and H.264/H.265 video codec. The SiP ships with 512 MB to 8 GB LPDDR4 RAM and 4 GB to 64 GB eMMC flash, with commercial and industrial-grade temperature support. MSRZG3E MSRZG3E SiP specifications: SoC – Renesas RZ/G3E dual or quad Arm Cortex-A55, Arm Cortex-M33 core MCU Memory – 512 MB to 8 GB LPDDR4 RAM Storage 4 GB to 64 GB eMMC NAND flash 2 Mbit to 512 Mbit SPI NOR flash 476-pad land grid […]

August 28, 2025August 28, 2025 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

Octavo OSD62x-PM SiP combines Texas Instruments AM62x SoC with up to 2GB DDR4 in a tiny 14x9mm BGA package

Octavo OSD62x-PM System-in-Package (SiP) integrates Texas Instruments AM62x quad-core Cortex-A53 SoC, up to 2GB DDR4 memory, and required passive components into a tiny 14x9mm BGA package. It’s a smaller and cheaper version of the Octava OSD62x SiP (21x21mm) with AM62x SoC, DDR4, PMIC, EEPROM, and optional integrations. We noted both the OSD62x and OSD62x-PM in our previous article, but both are now available for purchase, and the OSD62-PM-BRK Evaluation Board is also ready to ship. Octavo OSD62x-PM specifications: SoC – Texas Instruments AM62x (AM623/AM625) CPU – Up to 4x Arm Cortex-A53 @ 1.4GHz MCU – Arm Cortex-M4F GPU – 3D graphics up to 2048×1080 @ 60 fps (AM625 only) Storage I/F – 1x eMMC, 2x SDIO, 1x GPMC Display I/F – 24-bit RGB MIPI DPI and OLDI/LVDS up to 1080p60 Camera I/F – 1x MIPI CSI-2 with DPHY 1.2 Networking – 2x 10/100/1000M Gigabit Ethernet with TSN support USB – […]

April 9, 2025April 11, 2025 by Debashis Das - 4 Comments

Microchip SAMA7D65 Cortex-A7 MPU comes in SoC and SiP packages with up to 2Gbit integrated DDR3L memory

Microchip has recently released the SAMA7D65 MPU, a high-performance Arm Cortex-A7 embedded processor designed for HMI and connectivity applications across industrial, home, medical, and appliance markets. The MPU is available in both System-in-Package (SiP) and System-on-Chip (SoC) variants and features various display interfaces, including MIPI DSI, LVDS, and 8-bit Serial RGB interfaces, along with a 2D GPU for graphical acceleration. Memory and storage options include support for 16-bit DDR2/DDR3/DDR3L and LPDDR2/3 memory, optional 1 Gbit or 2 Gbit DDR3 RAM, NAND Flash, eMMC Flash, and SD card. It features dual Gigabit Ethernet with TSN support, an I3C controller, five CAN-FD interfaces, and three high-speed USB ports. Additionally, it comes with various security features, including physically unclonable function (PUF), secure boot, key storage, and cryptographic accelerators for AES, SHA, RSA, and ECC. Microchip SAMA7D65 SoC/SiP specifications: CPU – Arm Cortex-A7 core up to 1 GHz Arm TrustZone, NEON, FPU 32KB L1 I-cache […]

October 14, 2024October 13, 2024 by Debashis Das - 1 Comment

Wiznet W55RP20-EVB-Pico board features W55RP20 SiP with W5500 Ethernet controller and RP2040 MCU

Wiznet has recently released the W55RP20-EVB-Pico dev board, a compact board based around the W55RP20 SiP that fuses the Raspberry Pi RP2040 MCU and the W5500 Ethernet controller into a single IC, plus a 2MB flash chip for firmware storage. Just last month we wrote about W5100S-EVB-Pico2 and W5500-EVB-Pico2 dev boards, both the boards have a newer Raspberry Pi RP2350 MCU and external Ethernet controller (W5500 or W5100S). The RP2350 offers additional security features such as One Time Programmable (OTP) memory, secure boot, and Arm TrustZone technology, making it more suitable for secure applications. The W55RP20 on the other hand integrates a W5500 Ethernet controller and the RP2040 in a single SiP which is also pin-compatible with the Raspberry Pi Pico, making it easy to use existing Pico accessories and code examples. W55RP20-EVB-Pico dev board specifications: SiP– W55RP20 microcontroller MCU – Raspberry Pi RP2040 Core– Dual Cortex M0+ cores up […]

September 15, 2024September 17, 2024 by Jean-Luc Aufranc (CNXSoft) - 6 Comments

ESP32-S3-PICO-based OMGS3 is the world’s smallest fully-featured ESP32-S3 module/board

Based on the ESP32-S3-PICO system-in-package (SiP), Unexpected Maker OMGS3 is a small, yet full-featured ESP32-S3 module/board whose designer claims is the world’s smallest in its category at just 25x10mm in size. It replaces the earlier Unexpected Maker NanoS3 based on the ESP32-S3FN8 SoC measuring 28 x 11 mm. The OMGS3’s ESP32-S3-PICO SiP integrates a dual-core ESP32-S3 WiFi and BLE wireless SoC, 8MB QSPI flash, and 2MB QSPI PSRAM. The board itself also includes a 3D antenna, an RGB LED, two LEDs for power and charging, and I/Os are exposed through 26 solder pads. Unexpected Maker OMGS3 specifications: SiP – Espressif ESP32-S3-PICO SoC ESP32-S3 dual-core Tensilica LX7 up to 240 MHz with 512KB SRAM, 16 KB RTC SRAM Wireless – WiFi 4 and Bluetooth 5 LE + Mesh Memory – 2MB QSPI PSRAM Storage – 8MB QSPI flash Antenna – High-gain 3D antenna I/Os via 26x solder pads Up to 17x GPIO […]

July 19, 2024July 19, 2024 by Tomisin Olujinmi - No Comments

Femtosense introduces the AI-ADAM-100 system-in-package for affordable, efficient AI-based voice processing on the edge

Femtosense’s newest release, the AI-ADAM-100, combines a low-power Arm Cortex M0+ microcontroller from ABOV Semiconductor with the Femtosense Sparse Processing Unit (SPU), an in-house neural processing unit. This combination powers AI voice processing and cleanup capabilities on edge devices. It leverages sparsity techniques to ensure that models can run on edge devices without intensive processing. Sparsity in AI refers to the presence of zeroes or non-zero values in the matrices and tensors used in machine learning models. No computation is required for these zero weights, heavily reducing processing requirements. The Femtosense AI-ADAM-100 aims to bring voice control to various devices such as home appliances, hearing aids, industrial headsets, and consumer earbuds. These appliances can implement voice user interfaces that allow users to talk naturally in their own words. On-device voice cleanup functionality would reduce infrastructure costs and improve the accuracy of the data sent to the cloud. The Femtosense SiP […]