verilog News - CNX Software - Embedded Systems News

March 15, 2026March 15, 2026 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

AERIS-10 open-source hardware radar can track multiple objects up to 20km away

AERIS-10 is an open-source hardware, “low-cost” (more on that later) 10.5 GHz phased array radar system featuring Pulse Linear Frequency Modulated (LFM) modulation and based on an AMD Artix-7 FPGA. Two versions are available: the AERIS-10N (Nexus), providing up to 3km range with an 8×16 patch antenna array, and the AERIS-10X (Extended), offering up to 20km range thanks to a 32×16 dielectric-filled slotted waveguide array. ARIES-10 key components and features: Main board FPGA – AMD Artix-7 XC7A100T for: PLFM Chirps generation via the DAC Raw ADC data read Automatic Gain Control (AGC) I/Q Baseband Down-Conversion Decimation Filtering Forward FFT Pulse Compression Doppler, MTI, and CFAR processing USB Interface MCU – ST STM32F746xx microcontroller for Power management FPGA communication Setup and interface with the components on the main, frequency synthesizer, and power amplifier boards, plus: GPS module for GUI map centering GY-85 IMU for pitch/roll correction of target coordinates BMP180 Barometer […]

March 4, 2026March 4, 2026 by Jean-Luc Aufranc (CNXSoft) - 14 Comments

Dabao board features open-source hardware Baochip-1x RISC-V MCU (Crowdfunding)

An open-source hardware board usually features a closed-source microcontroller or processors, but the Dabao evaluation board goes further with the open-source Boachip-1x MCU, whose RTL files are available. It’s also manufactured in such a way that it is inspectable with the Infra-Red, In Situ (IRIS) technique, so users can look at the silicon and confirm they’ve got the right chip in a non-destructive way. Baochip-1x is a “general-purpose” microcontroller with a 350 MHz Vexriscv RV32-IMAC CPU core, a BIO accelerator for I/Os with four 700MHz PicoRV RV32-EMC CPU cores, 4MB of ReRAM, 2MB SRAM, a USB interface, various other I/Os, and hardware secure elements such as cryptography accelerators, key stores, one-way counters, true random number generation, and hardware attack countermeasures such as glitch sensors and a security mesh. The Dabao board itself is pretty basic with the microcontroller, two 16-pin headers for I/Os, a USB-C port for power and programming, […]

October 16, 2025October 16, 2025 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

$4 Shrike-lite FPGA board combines 1120 LUTs Renesas ForgeFPGA with Raspberry Pi RP2040 MCU

Shrike Lite Renesas ForgeFPGA RP2040 board

Shrike-lite is an ultra-cheap FPGA board based on a 1120 LUTs Renesas ForgeFPGA device (SLG47910V) and also equipped with a Raspberry Pi RP2040 microcontroller. The board also features a USB-C port for power and programming, two 18-pin headers and a 12-pin PMOD-compatible header for I/Os, as well as Boot and Reset buttons, but not much else since it’s designed as a minimal development board. Shrike-lite and Shrike boards specifications: FPGA – Renesas ForgeFPGA (SLG47910V,1120 LUTs) 1120 5-bit LUTs 1120 DFFs 5 kb distributed memory 32 kb BRAM Configurable through NVM and/or SPI interface Package – STQFN-24 MCU – Raspberry Pi RP2040 dual-core Cortex-M0+ microcontroller @ 125 MHz with 264KB SRAM FPGA/ MCU interface – 6-bit high-speed bridge Storage – QSPI flash for configuration and storage USB – USB Type-C for programming & power Expansion 2x 18-pin headers for RP2040 and ForgeFPGA’s I/Os 12-pin PMOD compatible header Misc Boot and Reset buttons […]

June 11, 2024 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

GateMate Integrated Logic Analyzer (ILA) deep dive

CNXSoft: This is a guest article by Dave Fohrn, Embedded Software Engineer at Cologne Chip AG, that goes into detail about the company’s open-source integrated logic analyzer (ILA) for GateMate FPGA chips. A field-programmable gate array (FPGA) is a highly flexible integrated circuit in which complex logic circuits can be configured. They are often used as custom computing units in digital circuits because of their ability to process data quickly and in parallel using individually configured circuits. The digital circuits designed specifically for FPGAs are usually developed in a hardware description language such as Verilog or VHDL and are known as gateware. The term “gate” refers to the configurable digital logic units in the FPGA on which the individual gate circuits are implemented. An effective design can accelerate the computing process by strategically utilizing the various resources available in the FPGA, processing data in parallel, and intelligent implementing pipelining. A […]

January 23, 2024January 22, 2024 by Jean-Luc Aufranc (CNXSoft) - No Comments

Cologne Chip releases an open-source integrated logic analyser (ILA) for GateMate FPGA chips

Integrated logic analyser ILA Cologne GateMate FPGA

Cologne Chip’s “Integrated logic analyzer” (ILA) project is an open-source Verilog implementation of a logic analyzer running on the company’s GameMate A1 FPGA and designed to capture internal signals. When we first covered the GameMate A1 FPGA we noted Cologne relies on the open-source Yosys framework coupled with a proprietary, but free-of-charge, place & route tool contrary to most other FPGA vendors that only offer closed-source proprietary development tools. The German company has now released the GateMate integrated logic analyzer project to help customers debug their FPGA designs. The project includes the digital circuit of the ILA designed in the hardware description language Verilog and a Python program (ILA Control Program) used to configure the configuration of the ILA from the design under test (DUT) and provide an interface with the user during the debugging process. The user will also need a GateMate FPGA toolchain and GTKWave open-source program to […]

January 17, 2022February 28, 2022 by Jean-Luc Aufranc (CNXSoft) - 6 Comments

Tang Nano 9K FPGA board can emulate PicoRV32 RISC-V soft-core with all peripherals

Tang Nano 9K FPGA is the third board from Sipeed based on GOWIN FPGA following the original Tang Nano board with 1K LUT and Tang Nano 4K launched last year with GW1NSR-LV4C (aka GW1NSR-4C) FPGA offering 4068 logical units and 64 Mbit PSRAM, plus an Arm Cortex-M3 hard processor. As its name implies, the new board comes with 9K LUTs, as well as 64 Mbit PSRAM, 32 Mbit Flash, a micro SD card, and video I/O (HDMI, RGB LCD connector) that makes it suitable to run Verilog HDL code emulating a PicoRV32 RISC-V soft-core with all peripherals. Tang Nano 9K FPGA board specifications: FPGA – GOWIN LittleBee GW1NR-9/GW1NR-LV9 8,640 logical units (LUTs) 6,480 flip-flop 17,280 bits shadow SRAM (SSRAM) 486 Kbit block SRAM (BSRAM) 64 Mbit PSRAM 608 Kbit user flash 2x PLL Up to 276x user I/O Storage – 32 Mbit SPI flash. MicroSD card socket Display I/F HDMI […]

July 4, 2019February 16, 2020 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

$30 FireAnt Development Board Features Efinix Trion T8 FPGA (Crowdfunding)

When I think FPGA, company names such as Xilinx, Altera (now Intel), or even Microsemi come to my mind. But there are also other companies such as Anlogic or Lattice Semi that offer FPGA chips. Today I’ve come across another FPGA silicon vendor, namely Efinix, with their Trion T8 FPGA found in XIPS Technology’s tiny FireAnt development board targeting makers and hardware designers. FireAnt specifications: FPGA – Efinix Trion T8 (T8F81C2) with 7384x LE counts, 8x embedded multipliers, 1x low-power oscillator, 1x PLL, 122.88 kbit internal RAM; Package – BGA-81 (5×5 mm) Storage – 8 Mbit serial NOR Flash Expansion – 2x 20-pin headers (soldered or unpopulated) with up to 35 GPIOs Debugging & Programming Micro USB 2.0 port via FTDI FT232HQ USB to serial chip JTAG signals in bottom layer Misc – Onboard 33.333 MHz crystal oscillator for PLL; 6x LEDs including 4 user configurable; 3x buttons (Reset, BTN1, […]

October 4, 2017 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

NVIDIA Unveils Open Source Hardware NVDLA Deep Learning Accelerator

NVIDIA is not exactly known for their commitment to open source projects, but to be fair things have improved since Linus Torvalds gave them the finger a few years ago, although they don’t seem to help much with Nouveau drivers, I’ve usually read positive feedback for Linux for their Nvidia Jetson boards. So this morning I was quite surprised to read the company had launched NVDLA (NVIDIA Deep Learning Accelerator), “free and open architecture that promotes a standard way to design deep learning inference accelerators” The project is based on Xavier hardware architecture designed for automotive products, is scalable from small to large systems, and is said to be a complete solution with Verilog and C-model for the chip, Linux drivers, test suites, kernel- and user-mode software, and software development tools all available on Github’s NVDLA account. The project is not released under a standard open source license like MIT, […]