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Posts Tagged ‘freescale’

Freescale Unveils QorIQ LS1043A Quad core ARM Cortex A53 Communication Processor for Fanless Networking Equipment

October 22nd, 2014 5 comments

Freescale has introduced the QorIQ LS1043A communications processor, powered by four 64-bit ARM Cortex A53 cores, and destined to be integrated into “intelligent-edge networking equipment including security appliances, SDN (Software Designed Networks) / NFV (Network Functions Virtualization) edge platforms and other fanless, power-efficient applications.” A dual core version named LS1023A is also available.

QorIQ_LS1043A_Block_DiagramKey features of LS1043A and LS1023A SoCs:

  • CPU – Quad (LS1043A) or Dual (LS1023A) ARM Cortex-A53 64-bit cores @ 1 GHz to 1.5 GHz with 32/32 I/D Cache KB L1 and 1 MB L2 cache. 16,000+ CoreMarks.
  • Networking & High Speed Interfaces:
    • Up to six 1x GbE or 1x 10GbE and five x GbE
    • Four lane SerDes up to 10 GHz multiplexed across controllers supporting:
      • Three PCI Express Gen 2 interfaces
      • SATA 3.0 Interface
      • uQUICC Engine
  • Accelerators and Memory Control
  • Other peripherals
    • 3x USB 3.0 interfaces with PHY
    • QuadSPI
    • Integrated Flash Controller (IFC)
    • Quad I²C
  • Misc – QorIQ Platform’s Trust Architecture, ARM SMMU for hardware enhanced virtualization
  • Power Consumption – As low as 6W for a complete fanless system

The company provides a Linux 3.12 BSP, VortiQa  software stacks for the enterprise, SMB networking applications, security appliances, cloud equipment, etc…, and a 6-month evaluation license for CodeWarrior development tools for the company’s LS1 development platforms (no details provided). Freescale also claims third party tools and development kits are available, but did not list them, except for OpenDataPlane program developed in collaboration with Linaro LNG.

QorIQ LS1043A communications processor should start sampling in Q1 2015. More information is available on Freescale LS1043A and LS1023A product page, and QorIQ solutions are currently showcased at Linley Processor Conference, at the Hyatt Regency in Santa Clara, California, until October 23.

Via Embedded.com

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Freescale LS1021A-IOTA IoT Gateway Reference Design Powered by QorIQ LS1021A Dual ARM Cortex A7 SoC

October 6th, 2014 2 comments

Freescale has just launched a an IoT gateway reference design powered by their QorIQ LS1021A communication processors running Linux/OpenWRT, designed in partnership with TechNexion, and targeting various IoT applications such as building/home management, smart cities, networked industrial services, etc… Beside the dual core Cortex A7 QoirIQ processor, the board features six Gigabit Ethernet ports, two USB 3.0 ports, a SATA 3 port, two mini PCIe connector, an LVDS interface, HDMI output, Arduino UNO compatible headers, and various others expansions headers.

IoT Gateway Reference Design Board (Click to Enlarge)

IoT Gateway Reference Design Board (Click to Enlarge)

LS1021A-IOTA IoT gateway Specifications:

LS1021A IoT Gateway Enclosure (Click to Enlarge)

LS1021A IoT Gateway Enclosure (Click to Enlarge)

  • SoC – Freescale QorIQ LS1021A dual core Cortex A7 communication processor @ 1 GHz (5,000 coremarks)
  • MCU – Freescale Kinetis K20 Cortex M micro-controller
  • System Memory – 1 GB DDR3L
  • Storage – 1 Gb QSPI NOR Flash, SDHC slot (up to 32 GB) populated with a 4GB SD card, 1x mSATA 3 slot
  • Connectivity – 6x Gigabit ports via SGMII (Serial Gigabit Media Independent Interface) and RGMII (Reduced Gigabit Media Independent Interface) interfaces
  • Display I/F
    • 24-bit LVDS LCD interface muxed with QE UART (QUICCEngine UART) to header for PROFIBUS or RS485 (external transceiver required)
    • HDMI connector
  • Audio I/F – Audio in and out
  • USB – 2x USB 3.0 ports, 1x USB 2 mini port, and USB signals via mini PCIe interfaces
  • Expansions and I/Os:
    • Arduino UNO compatible headers with I2C, SPI, Analog in, etc..
    • 1x Terminal (USB to UART)
    • Header with 1x Four wire LP-UART to Arduino connector (ZigBee), SPI, and ADC
    • GPIO expansion header
    • GPIO, Flextimer, and CAN header
    • 2x mini PCIe (x1) slots
    • 6x Interrupts
    • 1x SPI, 2x I2C
    • 13x GPIO or 8x FTM (PWM)
  • Sensors – MMA8451Q 3-axis MEMS sensor
  • Certification – FCC Class B and CE
  • Power Supply – 12V. MC32VR500 regulator. Under 3 watts typical power consumption.
  • Dimensions – 20.3 x 17.8 x 6.4 cm (full system with enclosure)

The full kit include the board, a metallic enclosure, a 12V/5A power supply, a micro USB cable, and HDMI cables, and SD card with software and documentation. The company provide Linux and OpenWRT for the board, reference design files (schematics, layout, and BOM), as well as an hardware quick start guide and a user guide.

IoT Gateway Block Diagram

LSIoT Gateway Block Diagram

The reference design is “production ready” so that OEMs can bring products based on this design faster market, and a lesser load on their R&D teams. Freescale’s QorIQ LS1021A IoT gateway is available for order from Freescale for $429 (USD). Further details are available on LS1012A-IoT product page, including a video with an overview of the kit with a better look at the various ports, and a demo using MQTT protocol with two Freescale Freedom boards, and uploading data to IBM Cloud services. It also shows how the gateway is programmed with Node-RED JavaScript graphical environment.

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Freescale To Give Away StarterTRAK Development Boards for Automotive Applications

September 5th, 2014 No comments

Freescale StarterTRAK development boards are based on the company’s Kinetis EA Cortex M0+ MUCs or Qorivva 32-bit MCU targeting automotive applications with support a wide temperature range (–40° to +125°C) and interfaces such as LIN (Local Interconnect Network) and CAN. These development boards can be used for body and security, powertrain, and safety & chassis applications. Freescale has decided to giveaway 60 StarterTRACK development board to random winners, so if you are knowledgeable in this field it could be an opportunity to try the platform. There will be 5 different kits given away, all based on Kinetis MCU: TRK‐KEA8, TRK‐KEA64, TRK‐KEA128, KEA128LEDLIGHTRD and KEA128BLDCRD. Let’s have a closer look at TRK-KEA128 development board.

TRK-KEA Boards Description (SCI port not available on TRK-KEA128)

TRK-KEA Boards Description (SCI Selector is not available on TRK-KEA128)

Key features and specifications of  TRK-KEA128 board:

  • MCU – Kinetis KEA128 ARM Cortex M0+ MCU @ 48MHz with 16KB RAM and 128KB flash in a 80 LQFP package
  • On-board openSDA debugging and programming circuit using the PK20DX128 MCU
  • LIN communications interface
  • Analog interface with ambient light sensor
  • 4 high efficiency LEDs
  • 2 push buttons
  • SCI serial communication interface (sharing the openSDA interface)
  • CAN communications interface
Kinetis EA MCU Block Diagram

Kinetis EA MCU Block Diagram

The development kit includes a TRK-KEA128 board, a DVD with CodeWarrior software, a USB cable, TRK-KEA Quick Start Guide, and Freescale Warranty Card. Schematics, BoM, as applications notes are also provided by the company. Automotive application possible with this board include HVAC, doors, window lift and seat control, parking breaks, tire pressure monitoring system (TPMS), and more. They can also be used to control brushless DC motors. Full details can be found on TRK-KEA128 page.

If you’d like the board you can either spend $49, or try your luck for with giveaway. The constest is open to individuals who are at least 18 years old and resident in a non‐U.S.‐embargoed country, expect residents of Canada. To enter, simply fill that form with your name, email, and country of residence. That’s all, no question about your potential project is even asked. The draw will take place on September 24, 2014.

Thanks to Nanik!

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Freescale WaRPBoard Reference Platform for Wearables is Now Available for Pre-order

July 25th, 2014 1 comment

Back in January, Freescale announced WaRP (Wearable Reference Platform) comprised of the WaRPboard, a tiny board based on Freescale i.MX 6SoloLite running Android, and a daughter board with KL16 Cortex M0+ MCU and several sensors. The company collaborated with Revolution Robotics for the hardware design, and Kynetics for the software, and the platform is now available for pre-order for $149, and a few more details have surfaced since my first article.

WaRPboard Connected to Daughter (center) and the Other side of WarRPBoard (Right) - Click to Enlarge

WaRPboard Connected to Daughtercard (center) and the Other side of WarRPBoard (Right) – Click to Enlarge

The hardware specifications of WaRP are as follows:

  • WaRPboard:
    • SoC – Freescale i.MX 6SoloLite Cortex A9 processor @ 1GHz with 2D graphics Vivante GC355 and  GC320 GPUs.
    • System Memory – LPDDR2 (Micron Multi-Chip Package)
    • Storage – 4Gbit eMMC  (Same Micron MCP chip as for RAM)
    • Connectivity – WLAN and Bluetooth 4.0 LE via Murata LBEH17YSHC
    • Display I/F:
      • MIPI DSI for LCD display + touchscreen
      • EPCD for E-Ink Display
    • Sensors – Xtrinsic FXOS8700CQ, 6-Axis Sensor with Integrated Linear Accelerometer and Magnetometer.
  • Daughtercard:
    • MCU – Freescale Kinertis KL16 Cortex M0+ MCU
    • Sensors – Xtrinsic MMA955xL Motion-Sensing Pedometer
    • Misc – 2x user buttons
  • Power – Via micro USB, single cell 500 mAh LiPo battery connected to WaRPboard, or Wireless Charging via daughterboard

There are also two optional displays LCD LH154Q01 and E-ink ET017QC1 that will be available for the board.

WaRPboard + Daughterboard Block Diagram

WaRPboard + Daughter Board Block Diagram

The board can be used to develop applications for various type of wearables including activity trackers, sports/heart rate monitors, smartwatches, ECG monitoring, smart glasses, smart clothing, wearable imaging devices, augmented reality headsets, wearable computing and wearable healthcare devices.

Android 4.3 operating system will run on Freescale i.MX 6SoloLite, and a Standard Android SDK will be provided. At this time, there’s still not much other details about software,  firmware, hardware design files, and documentation, except the hardware and software will be full open sourced, development can be done with open source development tools without licensing fees needed, and all will be  managed via WaRPboard.org community.If you want more information or have questions, you may want to head over WaRPboard Google Group.

As mentioned on the introduction, the board can be pre-order for $149 now, and shipping is expected in September. Depending on your destination. shipping costs can be pretty expensive, as it would cost nearly $100 to ship to Thailand via UPS. The only other shipping option being to pick it up in Texas for free… I can’t find the optional displays in Boardzoo.

Thank you Nanik!

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ARM TechCon 2014 Schedule – 64-Bit, IoT, Optimization & Debugging, Security and More

July 23rd, 2014 No comments

ARM Technology Conference (TechCon) 2014 will take place on October 1 – 3, 2014, in Santa Clara, and as every year, there will be a conference with various sessions for suitable engineers and managers, as well as an exposition where companies showcase their latest ARM based products and solutions. The detailed schedule for the conference has just been made available. Last year,  there were 90 sessions organized into 15 tracks, but this year, despite received 300 applications,  the organizers decided to scale it down a bit, and there will be 75 session in the following 11 tracks:ARM_TechCon_2014

  • Chip Implementation
  • Debugging
  • Graphics
  • Heterogeneous Compute
  • New Frontiers
  • Power Efficiency
  • Safety and Security
  • Software Development and Optimization
  • Software Optimization for Infrastructure and Cloud
  • System Design
  • Verification

There are also some paid workshops that take all day with topics such as “Android (NDK) and ARM overview”, “ARM and the Internet of Things”, or “ARM Accredited Engineer Programs”.

As usual, I’ve gone through the schedule builder, and come up with some interesting sessions with my virtual schedule during the 3-day event:

Wednesday – 1st of October

In this session, Dr. Saied Tehrani will discuss how Spansion’s approach to utilize the ARM Cortex-R line of processors to deliver energy efficient solutions for the automotive MCU market has led the company to become a vital part of the movement toward connectivity in cars. Beginning with an overview of the auto industry’s innovation and growth in connected car features, he will explain how these systems require high performance processing to give drivers the fluid experience they expect. Highlights in security and reliability with ARM Cortex-R, including Spansion’s Traveo Family of MCU’s will also be presented.

HEVC and VP9 are the latest video compression standards that significantly improves compression ratio compared to its widely used predecessors H.264 and VP8 standard. In this session the following will be discussed:

  • The market need for GPU accelerated HEVC and VP9 decoders
  • Challenges involved in offloading video decoding algorithms to a GPU, and how Mali GPU is well suited to tackle them
  • Improvement in power consumption and performance of Mali GPU accelerated decoder
  • big.LITTLE architecture and CCI/CCN’s complementing roles in improving the GPU accelerated video decoder’s power consumption

ARM’s Cortex-M family of embedded processors are delivering energy-efficient, highly responsive solutions in a wide variety of application areas right from the lowest-power, general-purpose microcontrollers to specialised devices in advanced SoC designs. This talk will examine how ARM plans to grow the ARM Cortex-M processor family to provide high performance together with flexible memory systems, whilst still maintaining the low-power, low-latency characteristics of ARM’s architecture v7M.

IoT devices as embedded systems cover a large range of devices from low-power, low-performance sensors to high-end gateways. This presentation will highlight the elements an embedded engineer needs to analyse before selecting the MCU for his design. Software is fundamental in IoT: from networking to power management, from vertical market protocols to IoT Cloud protocols and services, from programming languages to remote firmware update, these are all design criteria influencing an IoT device design. Several challenges specific to IoT design will be addressed:

  • Code size and RAM requirements for the major networking stacks
  • Optimizing TCP/IP resources versus performance
  • Using Java from Oracle or from other vendors versus C
  • WiFi (radio only or integrated module)
  • Bluetooth (Classis versus LE) IoT protocols

Thursday – 2nd of October

Amongst ARM’s IP portfolio we have CPUs, GPUs, video engines and display processors, together with fabric interconnect and POP IP, all co-designed, co-verified and co-optimized to produce energy-efficient implementations. In this talk, we will present some of the innovations ARM has introduced to reduce memory bandwidth and system power, both in the IP blocks themselves and the interactions between them, and how this strategy now extends to the new ARM Mali display processors.

Designing a system that has to run on coin cells? There’s little accurate information available about how these batteries behave in systems that spend most of their time sleeping. This class will give design guidance on the batteries, plus examine the many other places power leakages occur, and offer some mitigation strategies.

64-bit is the “new black” across the electronics industry, from server to mobile devices. So if you are building or considering building an ARMv8-A SoC, you shall attend this talk to either check that you know everything or find out what you shall know! Using the ARMv8 Juno ARM Development Platform (ADP) as reference, this session will cover:

  • The ARMv8-A hardware compute subsystem architecture for Cortex-A57, Cortex-A53 & Mali based SoC
  • The associated ARMv8-A software stack
  • The resources available to 64-bit software developers
  • Demonstration of the Android Open Source Project for ARMv8 running on Juno.

Rapid prototyping platforms have become a standard path to develop initial design concepts. They provide an easy-to-use interface with a minimal learning curve and allow ideas to flourish and quickly become reality. Transitioning from a simple, easy-to-use rapid prototyping system can be daunting, but shouldn’t be. This session presents options for starting with mbed as a prototyping environment and moving to full production with the use of development hardware, the open-source mbed SDK and HDK, and the rich ARM ecosystem of hardware and software tools.Attendees will learn how to move from the mbed online prototyping environment to full production software, including:

  • Exporting from mbed to a professional IDE
  • Full run-time control with debugging capabilities
  • Leveraging an expanded SDK with a wider range of integration points
  • Portability of applications from an mbed-enabled HDK to your custom hardware

Statistics is often perceived as scary and dull… but not when you apply it to optimizing your code! You can learn so much about your system and your application by using relatively simple techniques that there’s no excuse not to know them.This presentation will use no slides but will step through a fun and engaging demo of progressively optimizing OpenCL applications on a ARM-powered Chromebook using IPython. Highlights will include analyzing performance counters using radar diagrams, reducing performance variability by optimizing for caches and predicting which program transformations will make a real difference before actually implementing them.

Friday – 3rd of October

The proliferation of mobile devices has led to the need of squeezing every last micro-amp-hour out of batteries. Minimizing the energy profile of a micro-controller is not always straight forward. A combination of sleep modes, peripheral control and other techniques can be used to maximize battery life. In this session, strategies for optimizing micro-controller energy profiles will be examined which will extend battery life while maintaining the integrity of the system. The techniques will be demonstrated on an ARM Cortex-M processor, and include a combination of power modes, software architecture design techniques and various tips and tricks that reduce the energy profile.

One of the obstacles to IoT market growth is guaranteeing interoperability between devices and services . Today, most solutions address applications requirements for specific verticals in isolation from others. Overcoming this shortcoming requires adoption of open standards for data communication, security and device management. Economics, scalability and usability demand a platform that can be used across multiple applications and verticals. This talk covers some of the key standards like constrained application protocol (CoAP), OMA Lightweight M2M and 6LoWPAN. The key features of these standards like Caching Proxy, Eventing, Grouping, Security and Web Resource Model for creating efficient, secure, and open standards based IoT systems will also be discussed.

Virtual Prototypes are gaining widespread acceptance as a strategy for developing and debugging software removing the dependence on the availability of hardware. In this session we will explore how a virtual prototype can be used productively for software debug. We will explain the interfaces that exist for debugging and tracing activity in the virtual prototype, how these are used to attach debug and analysis tools and how these differ from (and improve upon) equivalent hardware capabilities. We will look in depth at strategies for debug and trace and how to leverage the advantages that the virtual environment offers. The presentation will further explore how the virtual prototype connects to hardware simulators to provide cross-domain (hardware and software) debug. The techniques will be illustrated through case studies garnered from experiences working with partners on projects over the last few years.

Attendees will learn:

  • How to set up a Virtual Prototype for debug and trace
  • Connecting debuggers and other analysis tools.
  • Strategies for productive debug of software in a virtual prototype.
  • How to setup trace on a virtual platform, and analysing the results.
  • Hardware in the loop: cross domain debug.
  • Use of Python to control the simulation and trace interfaces for a virtual platform.
  • 14:30 – 15:20 – GPGPU on ARM Systems by Michael Anderson, Chief Scientist, The PTR Group, Inc.

ARM platforms are increasingly coupled with high-performance Graphics Processor Units (GPUs). However the GPU can do more than just render graphics, Today’s GPUs are highly-integrated multi-core processors in their own right and are capable of much more than updating the display. In this session, we will discuss the rationale for harnessing GPUs as compute engines and their implementations. We’ll examine Nvidia’s CUDA, OpenCL and RenderScript as a means to incorporate high-performance computing into low power draw platforms. This session will include some demonstrations of various applications that can leverage the general-purpose GPU compute approach.

Abstract currently not available.

That’s 14 sessions out of the 75 available, and you can make your own schedule depending on your interests with the schedule builder.

In order to attend ARM TechCon 2014, you can register online, although you could always show up and pay the regular on-site, but it will cost you, or your company, extra.

Super Early Bird Rare
Ended June 27
Early Bird Rate
Ends August 8
Advanced Rate
Ends September 19
Regular Rate
VIP $999 $1,299 $1,499 $1,699
All-Access $799 $999 $1,199 $1,399
General Admission $699 $899 $1,099 $1,299
AAE Training $249 $299 $349 $399
Software Developers Workshop $99 $149 $199 $249
Expo FREE FREE $29 $59

There are more types of pass this year, but the 2-day and 1-day pass have gone out of the window. The expo pass used to be free at any time, but this year, you need to register before August 8. VIP and All-access provides access to all events, General Admission excludes AAE workshops and software developer workshops, AAE Training and Software Developers Workshop passes give access to the expo plus specific workshops. Further discounts are available for groups, up to 30% discount.

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Thread is a New IP-based Wireless Protocol Leveraging 6LoWPAN and 802.15.4 Standards

July 21st, 2014 2 comments

Wi-Fi is a neat way to connect devices to Internet, but it has two main inconveniences: relatively high cost and power consumption. Luckily there are standards that addresses the cost and power consumption issues. Radio chips based on IEEE 802.15.4, a standard which specifies the physical layer and media access control for low-rate wireless personal area networks, are common place and found in many existing devices relying on higher level wireless protocols such as ZigBee, ISA100.11a, WirelessHART, and MiWi. AFAIK, Zigbee is the most popular of the aforementioned protocols, but is hindered by the requirements of the license for commercial products (annual fee), Zigbee membership requirements conflict with many open source license such as GPL, and the standard suffers from lack of interoperability and IPv6 support, and power requirements that are too high for some applications. So a consortium of seven companies namely ARM, Big Ass Fans, Freescale, Nest, Samsung, Silicon Labs, and Yale Security, have come together to start working on “Thread”, a new wireless protocol leveraging 802.15.4 standard and existing transceiver chips,  that is legacy-free, and is based on 6LoWPAN (Low Power IPv6 connectivity), and UDP protocols.

 

Thread_Wireless_Protocol

Thread specifications are currently work in progress, but it will be a low power IP based open protocol supporting mesh networking (Up to 250 devices), that is both secure and user-friendly, and provides fast-time to market thanks to existing radio silicon. It will be used in various products such as electric appliances, access control, climate control, energy management, lighting, as well as safety and security devices. Two products companies are part of the group Nest and Big Ass Fans, so thermostats and fans based on Thread are likely to be available soon. Nest V2 actually comes with a 802.15.4 capable SoC (Ember EM357) that used to be disabled, but “is already being used successfully in Nest products today” thanks to a simple firmware upgrade, although I’m not sure if this is the case internally, or on customer’s premises.

The Thread Group is now looking for new members, and companies that are interested in Thread can join the consortium as a Sponsor (with more voting rights), or Contributor member. There’s no individual membership at this stage.

Via Semiwiki

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EzeeCube is a Modular XBMC Media Hub with Up to 9TB Storage (Crowdfunding)

June 5th, 2014 8 comments

EzeeCube is a media hub that automatically synchronizes photos, videos and contacts from your iOS and Android phones or tablets. The hardware is based on Freescale i.MX6 Dual SoC, includes a 1 TB hard drive upgradable to 9TB with 4 extra drives, can be upgraded with hardware modules, and runs a custom version of XBMC on top of Linux built with the Yocto Project.

EzeeCube with EzeeDisk (extra 1TB HDD) and EzeePlay (Blu-ray Drive)

EzeeCube with EzeeDisk (extra 2TB HDD) and EzeePlay (Blu-ray Drive)

EzeeCube specifications:

  • SoC – Freescale i.MX6 Dual with two ARM Cortex A9 cores @ 1 GHz and Vivante 3D GPU
  • System Memory – 1GB DDR3 @ 1066MHz
  • Storage – 4GB eMMC,  1TB 2.5″ hard drive @ 5400rpm, and SD/SDXC card slot
  • Connectivity – Gigabit Ethernet, 802.11n Wi-Fi (2.4GHz), and Bluetooth 3.0
  • Video Output – HDMI 1.4 with CEC support
  • Audio Output – HDMI and optical S/PDIF
  • Video Containers – AVI, MPEG, WMV, ASF, FLV, MKV/MKA, QuickTime, MP4, M4A, AAC, NUT, OGG, RealMedia RAM/RM/RV/RA/RMV8, OGM, 3gp, VIVO, PVA, NUV, NSV, NSA, FLI, FLC, DVR-MS and WTV
  • Video Codecs – H.264 (AVC BP/MP/HP), MPEG4 (AP/ASP), H.263, VC1, MPEG-2 (MP/HP), DivX/Xvid, and VP8
  • Audio Formats – MIDI, AIFF, WAV/WAVE, AIFF, MP2, MP3, AAC, AAC+, Vorbis, AC3, DTS, ALAC, AMR, FLAC, Monkey’s Audio (APE), RealAudio, SHN, WavePack, MPC, Speex, WMA, ADPCM, CDDA and more
  • USB – 1x USB 2.0 host port, 1x micro USB OTG
  • Misc – Reset Button, EzeeStack connector for add-ons
  • Power – 5V power adapter
  • Dimensions – 98 x 98 x 23mm
  • Weight – 272 grams
Rear Panel of EzeeCube Media Hub

Rear Panel of EzeeCube Media Hub

The specifications look pretty standard, except for the included 1TB hard drive, the long list of supported audio and video formats, and EzeeStack connector that will let you add extra hardware:

  • EzeePlay – Blu-ray Drive
  • EzeeDisk – Stackable 2 TB drive. You can add four in total to get 9TB storage (1 + 2 x 4).

The company has modified the software so that you can manage your media files (up to ~500,000 photos on a 1TB hard drive) by automatically sorting your photos and videos by albums, dates and location, finding duplicates, recognizing face and organizing them automatically, and finding locations and dates of photos to organize them into events (holidays, weddings, birthday parties, concerts, etc..). This can be achieved thanks to EzeeSync for iOS 5+ or Android 4.0+ (soon). Other features and apps supported include a dozen of (unnamed) audio, video, and photo apps, DLNA, Airplay, backup to USB hard drive, and PVR function.

The developers are currently looking for $75,000 via a fixed funding campaign on Indiegogo. A ‘Super Early Hackers Special” pledge will get your the EzeeCube with 1TB hard drive for $179, if you miss the super early pledge for the first 100 pieces, it will then be $189 for 200 more units, and $199 after that. The EzeePlay Blu-Ray player perks requires $99, and each EzeeDisk perk $129 for a 2TB hard drive. So if you want a system with 9TB storage the total cost would be $695. A first glance, I thought it was all pretty expensive, but considering the hardware corresponds roughly to a $99 Wandboard Dual with enclosure and a 1TB hard drive, pricing seems reasonable. Shipping is free to Hong Kong, and $5 to $15 for the rest of the world. “Hackers”‘ perks will be shipped by the end of the year (October, November), and after EzeeBox will be shipping in batch between December 2014 and March 2015. EzeeDisk and EzeeDrive accessories are only scheduled to ship by March 2015.

Beside the Indiegogo campaign, further details may eventually be provided on EzeeCube.com.

Via Stephan Rafin and Harley

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Novena Open Source Hardware ARM Laptop Gets Crowdfunded for $1995

April 4th, 2014 4 comments

In 2012, Andrew Huang (“Bunnie”) decided to build an open source hardware and software laptop codenamed Novena powered by Freescale i.MX6 as a side project. The goal of the project was to be fully open source, both in terms of hardware and software, and the components have been selected so that the datasheets can be downloaded without NDA. Design has now been completed, and a crowdfunding campaign has now been launched on Crowd Supply, but since finding low cost part was not priority, you’ll have to fork $1,995 to get the complete laptop, $1,195 will get you the desktop version, and $500 the motherboard only. There’s also a version of the laptop called “Heirloom Laptop” with a hand-crafted wood and aluminum case that goes for $5,000.

Novena_Open_Source_Hardware_Laptop

Novena Laptop

Let’s go through the board specs first:

  • SoC – Freescale iMX6 Quad-core Cortex A9 CPU with NEON FPU @ 1.2 GHz. – NDA-free datasheet and programming manual
  • System Memory – 64-bit, DDR3-1066 SO-DIMM slot. 4GB DDR3 SO-DIMM will be installed in the shipped products.
  • Storage – Boots from microSD firmware, SATA-II (3Gbps) connector
  • Internal ports & sensors:
    • mini PCI-express slot
    • UIM slot for mPCIx mobile data card support
    • Dual-channel LVDS LCD connector with USB2.0 side-channel for a display-side camera
    • Resistive touchscreen controller
    • Stereo 1.1W, 8-ohm internal speaker connectors
    • 2x USB2.0 internal connectors for keyboard and mouse/trackpad
    • Digital microphone (optional, not populated by default)
    • 3-axis accelerometer
    • 3x internal UART ports
  • External ports:
    • HDMI
    • SD card reader
    • headphone + mic port (compatible with most mobile phone headsets, supports sensing in-line cable buttons)
    • 2x USB 2.0 ports, supporting high-current (1.5A) device charging
    • 1Gbit ethernet
  • Other features:
    • 100 Mbit ethernet – dual Ethernet capability allows laptop to be used as an in-line packet filter or router
    • USB OTG – enables laptop to spoof/fuzz ethernet, serial, etc. over USB via gadget interface to other USB hosts
    • Utility serial EEPROM – for storing crash logs and other bits of handy data
    • Spartan-6 CSG324-packaged FPGA – has several interfaces to the CPU, including a 2Gbit/s (peak) RAM-like bus — for your bitcoin mining needs. Or whatever else you might want to toss in an FPGA.
    • High-speed I/O expansion header – useful for implementing a wide variety of functions, from simple GPIO breakouts to high-performance analog data sampling front-ends

Beside the 4GB RAM, the board with also come with a microSD card with basic Debian install, Ath9k (blob-free firmware) mPCIe wifi card, 802.11n b/g 1T1R and a 16V, 3.75A power supply (100-240V 50/60Hz input).

The desktop version will come with a gen-2 hacker case, a 13.3″ TFT  LCD (1080P), an LVDS to eDP adapter board, and some other accessories such as cables.

The laptop version will features all hardware from the desktop version but add a battery controller board, a 240 GB SSD, a 3000mAh 3-cell lithium battery pack, measure 330 mm x 225 mm x 27mm and weight 1.36 kg. The keyboard is not included.

$5,000 Heirloom Laptop

$5,000 Heirloom Laptop

Since these laptops and desktop PC are fully open source, you can download the hardware design files, get the source code, and build the Linux distribution yourself without binary blobs.

The board should ship in November 2014, the All-in-one desktop in December 2014, the laptop in January 2015, and Heirloom laptop in February 2015.

Via Liliputing

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