MIPS Introduces microAptiv, interAptiv and proAptiv Cores

MIPS Technologies has introduced their new Aptiv generation of microprocessor cores divided into 3 families: proAptiv, interAptiv and microAptiv.

proAptiv Core (equivalent to ARM Cortex A15 DMIPS/Mhz)

The proAptiv core achieves a 4.4 CoreMark/MHz score which according to MIPS is the best score reported for any licensable IP core. It also achieves 3.5 DMIPS/MHz which is abnout the same performance as ARM Cortex A15.  This core targeted at high performance applications such as smartphones, tablets, HD STB, automotive infotainment and residential gateways. proAptiv is recommended as an upgrade to MIPS32 74K/1074K cores.

MIPS proAptiv Architecture

interAptiv Core (equivalent to ARM Cortex-R5 DMIPS/Mhz)

The multi-threaded interAptiv core delivers higher CoreMark/MHz (3.2) than competing cores in similar die area and 1.7 DMIPS/MHz per core. The interAptiv is aimed at mid-range applications such as mainstream STB, digital cameras, mid-range smartphone, broadband CPE (Consumer Premise Equipment) and SATA/SSD controllers.

MIPS interAptiv Architecture

microAptiv Core (equivalent to ARM Cortex-M3/M4 DMIPS/Mhz)

The microAptiv core is targeted at low power cost sensitive applications such as touchscreen controllers, SIM/security and GPS. MIPS claims it achieves the highest CoreMark/MHz (3.09) score among MCU / DSP solutions.  It comes in 2 versions:

  • microAptiv MCU core – designed with application-specific features and real-time performance for microcontroller SoC development.
  • microAptiv MPU core – includes a cache controller and MMU facilitating embedded system designs executing operating systems that manage virtual memory such as Linux and Android.
MIPS microAptiv MCU Core Architecture

microAptiv cores can be used as an upgrade to MIPS32 M14K cores.


The Aptiv core families can be licensed now with proAptiv and interAptiv cores expected to be available by mid-2012 in single (proAptiv only), dual and quad-core configurations. Single core interAptiv will (strangely) only be available by the end of the year. Both the MCU and MPU versions of the microAptiv cores are available now. Even though the silicon is not ready yet, developers can use Imperas MIPS Aptiv models in OVP.

You can find more information on MIPS Aptiv page.

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2 Replies to “MIPS Introduces microAptiv, interAptiv and proAptiv Cores”

  1. MIPS has a different architecture and instruction than ARM, hasn’t it?

    If so, what is the target market, and market share compared to ARM? I believe my HDX1000 has a MIPS processor, but apart from that I only hear ARM, ARM and ARM …

  2. @ Sander
    Yes, MIPS and ARM are different archicterure.
    MIPS is a direct competitor with ARM, but the latter has been much more successful.

    I’ve actually spend as much time working on MIPS as ARM. Sigma Designs chips (for STB, media players) are based on MIPS, there are some low cost tablets based on MIPS (Ingenic processor), Microchips MCU are using MIPS cores.

    Yes, your HDX1000 has a Sigma Designs SMP8635 (I worked on that!) using a MIPS core.

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