Fomu FPGA board fits inside a USB port, Supports Python, RISC-V Softcore

Sutajio Ko-usagi launched Tomu, a tiny open source hardware USB board that fits inside a USB port at the very beginning of this year. The company is back with a similarly shaped board, but instead of featuring a Silicon Labs EFM32 Arm Cortex-M0+ microcontroller, Fomu is equipped with a Lattice ICE40 UltraPlus FPGA.

Fomu FPGA BoardFomu specifications:

  • FPGA – Lattice ICE40UP5K FPGA with 5280 logic cells
  • System Memory – 128 kB RAM for a soft CPU
  • Storage – 1 or 2 MB SPI flash
  • Clock – 48 MHz crystal oscillator
  • USB – 1x USB 2.0 FS (12 Mbps) port
  • Misc – 4x buttons, 1x RGB LED

USB FPGA BoardThe default Fomu firmware exposes a USB bootloader running a RISC-V softcore, and the platform is powerful enough to run a port of Python. It’s also possible to experiment with LM32 and OpenRISC softcores on the platform.

Using the board is pretty straightforward as just you need to insert it into one of the port of your computer, and load your RISC-V, Python or HDL code via USB. Lattice Semi ICE40UP5K FPGA is supported by  open source projects such as  Yosys, IceStorm, and nextpnr, so you don’t need to sign NDA to download the toolchain, or buy any programming tools. Documentation, software and hardware design files for the board have been made available via several repositories on Github.

Fomu vs Tomu vs ICEbreaker-vs tinyfpga BX
Click to Enlarge

The company also compared Fomu to Tomu, and other ICE40 boards such as iCEBreaker and TinyFPGA-BX.  Fomu looks better if you need maximum portability, and want to run softcores due to the higher clock speed coupled with 128 kB RAM, but if you also need I/Os, Fomu is not quite as suitable since it has only four inputs, and one RGB LED, but no actual spare GPIOs.

Fomu launched on Crowd Supply about a week ago, and they’ve already surpassed their $10,000 funding target. A pledge of $39 should get your Fomu board with pre-loaded firmware and a plastic enclosure, and bundles of 2 to 100 boards are also offered to reduce the per-unit cost. Shipping is free to the US, but adds $5 to $20 to the rest of the world depending on the selected perk. Another reward is the much larger Fomu EVT used for development, but only 50 units are available, and it won’t be manufactured after the crowdfunding campaign. Backers should expect to receive their Fomu board(s) in July 2019, except for the Fomu EVT which will ship at the end of February.

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7 Replies to “Fomu FPGA board fits inside a USB port, Supports Python, RISC-V Softcore”

  1. >so you don’t need to sign NDA to download the toolchain, or buy any programming tools.

    You don’t sign an NDA to get the Xilinx or Altera tools either. The only time you’d sign an NDA is for some sort of IP block AFAIK.

    Anyhoo. This is interesting but $40 seems a bit steep really. Only having 4 IOs is going to get really old really quick.

    1. No NDA’s but there ARE restrictions on use, etc. with the Xilinx or Intel (Call a spade a spade, it’s Chipzilla now and they act the part, right along with support, etc…) tools and base IP you get with the toolchains.

      There’s nothing at-all other than compliance with the GPL or LGPL respectively. A Pulpino or VexRiscv should just drop on to things. I wish the TinyFPGA Bx included more SRAM, but whatever. This is semi-useful for a very small number of things really. The ability to pour a so-so RISC-V core and code with it without anything else is, I suspect, the draw there for this one.

      Someone should tell ’em the Kendryte goes there as well as anything $100 or less in the typical FPGA space.

      1. The restrictions are on the size of chips you can use aren’t they? I think that’s acceptable for most people. I think with the Altera/Intel stuff you get the in-chip logic analyser functionality in the free version too (never used it, Xilinx doesn’t give it away for free :() which is a major positive for working within the restrictions.

        Don’t get me wrong having a fully opensource toolchain is the way forward. If we eventually get a process that can go directly from something like MyHDL right to a bitstream the bar to entry for FPGAs would become very low.

    1. Meh…it’s got limited potential- it doesn’t have enough store and those lines are inputs only, so you can’t SPI attach an SD card for store.

    1. 5k LUTs leaves you with few resources, really- with much of any softcores you might seriously use. The 8k’s are more interesting from Lattice’s lineup- and aren’t much more pricey.

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