Espressif ESP32-S2 Secure WiFi MCU Comes with an Xtensa LX7 Core @ 240 MHz

ESP32-S2Espressif Systems has unveiled a new ESP32 WiFi MCU based on Cadence (previously Tensilica) Xtensa LX7 core instead of the usual Xtensa LX6 core(s). ESP32-S2 is powered by a single Xtensa LX7 core clocked at 240 MHz, supports Wi-Fi HT40 @ 2.4 GHz, and provides up to 43 GPIOs.

Espressif ESP32-S2 specifications:

  • CPU – Cadence Xtensa single-core 32-bit LX7 microcontroller @ up to 240 MHz, and ultra-low-power co-processor
  • System Memory – 320 kB SRAM, external SPIRAM support up to 128 MB in total, 16 KB RTC memory
  • Storage –  128 kB ROM, up to 1 GB of external flash support
  • Connectivity
    • Wi-Fi 802.11 b/g/n 1×1 transmit and receive with HT40 support with data rate up to 150 Mbps
    • Support for TCP/IP networking, ESP-MESH networking, TLS 1.0, 1.1 and 1.2 and other networking protocols over Wi-Fi
    • Support Time-of-Flight (TOF) measurements with normal Wi-Fi packets
  • I/O & peripherals
    • 43x programmable GPIOs
    • 14x capacitive touch sensing IOs
    • SPI, I2C, I2S, UART, ADC/DAC, and PWM
    • LCD (8-bit parallel RGB/8080/6800) interface and also support for 16/24-bit parallel
    • Camera interface supports 8 or 16-bit DVP image sensor, with a clock frequency of up to 40 MHz
    • Full speed USB OTG support
  • Security
    • RSA-3072-based trusted application boot
    • AES256-XTS-based flash encryption to protect sensitive data at rest
    • 4096-bit eFUSE memory with 2048 bits available for application
    • Digital signature peripheral for secure storage of private keys and generation of RSA signatures
  • Low Power Consumption
    • Fine resolution power control through a selection of clock frequency, duty cycle, Wi-Fi operating modes and individual power control of internal components.
    • When Wi-Fi is enabled, the chip automatically powers on or off the RF transceiver only when needed
    • ULP co-processor with less than 5 uA idle mode and 24 uA at 1% duty-cycle current consumption.
    • Improved Wi-Fi-connected and MCU-idle-mode power consumption.
  • Package – 7×7 mm QFN package

ESP32-S2 has a larger package and offers more I/O and peripherals options than predecessors including support for RGB LCD displays and a USB OTG interface, but it lacks Bluetooth. I can’t find a clear comparison between Xtensa LX6 and LX7 cores, but you can find more details about the later in LX7 product brief.

ESP32-S2 supports Espressif’s software development framework (ESP-IDF) like their other ESP32 chips. Applications for ESP32-S2 include Smart Home connectivity, battery operated devices, industrial automation, POS machines, and service robots.

The first ESP32-S2 beta engineering samples will be available in June. More details may be found in the press release.

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20 Replies to “Espressif ESP32-S2 Secure WiFi MCU Comes with an Xtensa LX7 Core @ 240 MHz”

  1. It looks like the secure part is signed/encrypted boot from flash and encryption for data on flash. There doesn’t seem to be any encryption for spi connected RAM though so unless you can fit everything in the internal SRAM the rest of it seems a bit pointless.

    1. The SPI RAM is very slow compared to internal RAM, so it is preferential to use internal anyway. Just need to remember to keep sensitive stuff internal as well as time-critical stuff and it should work out OK I guess.

      1. It’s not as simple as that. Putting anything into external RAM invalidates all the rest of your security unless you can validate the contents.
        I would literally just have to poke random values where there are zeros in the memory to mess up the bounds of a string and get the processor to go off into the weeds.
        Once I can locally attack your system I can dump out your firmware and then I can disassemble it to find remotely exploitable bugs.

  2. Timing on these ESP chips are always a little funky. Difficult to achieve hard real-time guarantees when wireless interrupts everything.

    1. Isn’t that largely mitigated with the esp32 having a dual core cpu? This new design says it has a single core cpu but the “ultra-low-power co-processor” I bet is for handling the wifi.

    1. It would have to be run from external SPIRAM. Would that work with acceptable performance?

      1. The ESP32 in not capable of executing instructions from external RAM (non-local IRAM). Its unlikely this has changed. The OS list applies to the core when adequately configured in a design. The design as configured for ESP32 is unlikely to run (modern) Linux.

    2. Linux in the uClinux sense, maybe, not in the “what distro shall I install” sense.

    3. It’ll be mmu-less linux. Imagine Linux that crashes all the time after you’ve spent weeks getting tools no one has properly maintained/cared about in over a decade to work.
      IMHO if you want a linux-like OS on a mmu-less system NuttX is the way to go.

      1. Having maintained a uClinux distro back in 2003 (isl3893), I can tell you that uClinux is a pain. uCdist has some packages, but pthread would not work, and there was no FPU, so softfloat.

        But probably an improvement compared to FreeRTOS.

  3. “Secure” when the wifi driver is a binary blob 🙂

    This is a good chinese joke.

    They will say it is because of FCC certification…

  4. The dual core version is coming: ESP32-S3x. Just don’t ask me how they come with those names 🙂

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