More Details about Alibaba XT910 64-bit RISC-V Core

Alibaba unveiled XuanTie 910 16-core RISC-V Processor last year with few details except it targetted high-performance 5G, AI, and autonomous driving applications.

The company has now provided more details about Alibaba XuanTie 910 (aka XT910) processor during the virtual Hot Chips 2020 conference, and he notably compared the RV64GCV core found in the processor to Arm Cortex-A73 core.

Alibaba XT910 main features and specifications:

  • CPU – Up to 16x 64-bit RISC-V (RV64GCV) cores with RISC-V Vector extension and custom Turbo extension in four clusters of four cores; 12-stage out of order; Coremark: 7.1 per MHz
  • Cache – 32KB or 64KB I/D cache per core, up to 8MB L2 cache per cluster
  • FP16-FP64 floating-point unit
  • Vector Computing Unit (aka Vector Engine) for AI acceleration
  • Memory Management – Sv39 MMU + 8/16 PMP
  • Interrupt Controller – Clint + PLIC
  • Process – Final: 12nm FinFET; engineering samples: TSMC 28nm HPC

Alibaba RISC-V Turbo instructions provide acceleration for bit operations, memory access, core sync, etc.. and show some improvement in OpenSSL and Nbench benchmarks. They can be disabled to keep compatibility with “standard” RISC-V.

T-Head semiconductor, the Alibaba organization that designed the chips compared the performance of XT910 to Cortex-A73 (Kirin 970) with the same L1 cache capacity, and showed both are closely matched. It’s unclear whether the benchmarks included the RISC-V Turbo extension. As a side note, it will be interesting to see how custom RISC-V instructions will be managed in the Linux kernel, and whether those will be enabled at runtime or/and compiler time.

In an Anandtech interview and live blog, the company confirmed KT910 is a high-end core for embedded SoCs to be found in the cloud and edge devices, and they are working with open-source companies to make the source code available, but there are apparently legal challenges for a high-performance core.

The company is not only working on high-performance cores, as they have already designed XT902 microcontroller core (Cortex-M0+ class) with hardware TEE, and there are plans for XT903, XT907, XT908 cores filling the gap between XT902 and XT910.

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9 Replies to “More Details about Alibaba XT910 64-bit RISC-V Core”

    1. I suspect there won’t be any GPU in XT910 based SoCs since they target “cloud and edge”.

  1. Would like to know the legal challenges for high performance cores.

    Also wonder if these might appear in the open RISC project?

    1. I am also curious about it, although i expect US restrictions againt improving China’s tech industry.

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