xSPI MRAM provides an alternative to SPI NOR/NAND flash with up to 400MB/s R/W bandwidth

Everspin has unveiled the EMxxLX xSPI MRAM (Magnetoresistive Random Access Memory) non-volatile memory solution for industrial IoT and embedded systems providing an alternative to SPI NOR/NAND flash with much faster R/W data rates of up to 400MB/s and densities between 8Mbit and 64Mbit.

The higher speed is made possible by the new JEDEC expanded Serial Peripheral Interface (xSPI) standard interface and a clock frequency of up to 200 MHz, the maximum supported by the xSPI standard. All chips operate at 1.8V, and the family is offered in 24-ball BGA and 8-pin DFN packages.

Everspin xSPI MRAM block diagram — Block diagram, BGA package, and evaluation board

EMxxLX xSPI MRAM key features and specifications:

Density – 8Mb, 16Mb, 32Mb, 64Mb
400MBps sustained throughput with OSPI at 200MHz, DTR, for reads and writes
Expanded SPI (xSPI) bus interface supporting Octal, Quad, Dual, and Single SPI protocol
Up to 200MHz single and double transfer rate (STR/DTR) for Octal SPI
Up to 133MHz, SPI, DSPI, QSPI
Data endurance – Unlimited read, write and erase operations for the supported life of the product
Data retention – 10 Years minimum across temperature
JEDEC compliant: JESD251, JESD251-1 (free registration required to download the xSPI specs)
Byte level writes and reads with no erase required as persistent memory
Data integrity – No external ECC required
Low Power Modes:
- Standby – < 350µA (64Mb)
- Deep power-down – ~50µA w/ exit time < 100µS
SPI compatibility: NVSRAM, FRAM, NOR, Toggle MRAM
SPI, xSPI Commands for Program/Erase emulated NOR compatible Execute-in-place (XIP)
Dedicated 256-byte OTP area outside main memory – Readable and user-lockable, permanent lock with WRITE OTP command, not reflow protected
Erase capability – Chip/bulk erase and sector erase
Subsector erase 4KB, 32KB granularity
Security and write protection
- 16 configurable hardware write-protected regions plus top/bottom select
- Program/erase protection during power-up
- CRC command to detect accidental changes to user data
Voltage – 1.65–2.0V (1.8V)
Boot mode configurations – Boot in x1, x2, x4, x8
Software reset and hardware reset pin available
3-byte and 4-byte address modes
Sequential (burst) read and writes
Electronic signature – JEDEC-standard 3-byte signature
Packages
- 24-ball BGA, 6mm x 8mm (5 x 5 array)
- 8-pin DFN, 6mm x 8mm (No Octal SPI, limited to 133 MHz)
Temperature range – Commercial: 0°C to +70°C; industrial: -40°C to +85°C

logic diagram Everspin xSPI MRAM — Logic diagram for both packages

Eight main parts are available all offered in various packages and temperature ranges, and distributed in trays or tape & reels.

While the main highlight the xSPI MRAM is clearly its read and write speed of 400MB/s, or multiple times what’s possible with NOR or NAND flash devices, especially on the write side. An article by JBLopen lists other benefits including the lack of the need for erasing prior to programming, highly efficient writes (10 times less than NAND and 200 times less than NOR), and a NOR flash mode that allows backward software compatibility.

I do not have pricing information, but I suspect MRAM should be a bit more expensive than similar NOR/NAND SPI flash, so it would likely be only integrated into applications where the extra BoM cost makes sense. This should include applications where frequent write operations are needed (e.g. to save data), for Execute-in-Place (XiP) where the code is not fully loaded in RAM and executed from flash, etc…

Everspin is currently sampling EMxxLX xSPI MRAM series, and volume production is scheduled for H2 2022. More details may be found on the product page and the announcement.

Thanks to TLS for the tip.

Jean-Luc Aufranc (CNXSoft)

Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.