open source News - Page 47 of 92 - CNX Software

December 28, 2018March 4, 2019 by Jean-Luc Aufranc (CNXSoft) - 6 Comments

ClockworkPi GameShell Review – Part 1: Unboxing & Assembly Guide

ClockworkPi Gameshell is a portable retro gaming console kit designed to be hackable being powered by Allwinner R16 processor to run Linux, as well as an Arduino compatible Atmel AVR MCU. It’s partially open source hardware with PDF schematics, and firmware source code available on Github. The device launched last year on Kickstarter, raised close to $300,000, and started shipping to backers last summer. The company has now sent me a sample for review, so let’s have a look. The first part of the review will be more than just an unboxing, since the game console is meant to be assembled by the end user, and I’ll report my experience doing so. ClockworkPi Gameshell Unboxing The kit comes in a fairly large package that reads “GameShell – Redefine Portable Game Console” and lists the main specifications with quad core Cortex A7 processor, WiFi and Bluetooth connectivity, 1GB RAM, 16GB micro […]

December 26, 2018 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

Fomu FPGA board fits inside a USB port, Supports Python, RISC-V Softcore

Sutajio Ko-usagi launched Tomu, a tiny open source hardware USB board that fits inside a USB port at the very beginning of this year. The company is back with a similarly shaped board, but instead of featuring a Silicon Labs EFM32 Arm Cortex-M0+ microcontroller, Fomu is equipped with a Lattice ICE40 UltraPlus FPGA. Fomu specifications: FPGA – Lattice ICE40UP5K FPGA with 5280 logic cells System Memory – 128 kB RAM for a soft CPU Storage – 1 or 2 MB SPI flash Clock – 48 MHz crystal oscillator USB – 1x USB 2.0 FS (12 Mbps) port Misc – 4x buttons, 1x RGB LED The default Fomu firmware exposes a USB bootloader running a RISC-V softcore, and the platform is powerful enough to run a port of Python. It’s also possible to experiment with LM32 and OpenRISC softcores on the platform. Using the board is pretty straightforward as just you […]

December 19, 2018December 19, 2018 by Jean-Luc Aufranc (CNXSoft) - 26 Comments

Purism Librem 5 Linux phone development kits are now shipping

Purism Librem 5 is a privacy-focused open source Linux smartphone powered by NXP i.MX 8M processor that was launched via a crowdfunding campaign in August 2017 that ends up being extremely popular with over 1.5 million dollars raised. At the time, the phone was scheduled to ship on January 2019, but a $299 development kit with board, display and accessories was slated to ship in June 2018. There have been some delays, but the good news is that Librem 5 development kits are now shipping so third party software development for the phone will now really get started. Librem 5 development kit preliminary specifications: System-on-Module – Emcraft SOM-IMX8M module with NXP i.MX 8M Quad core Cortex A53 processor, at least 2GB LPDDR4 RAM and 16GB eMMC flash (I could not find exact RAM and storage capacities for the module used in the board) Display – 5.7″ LCD touchscreen with a […]

December 18, 2018December 18, 2018 by Jean-Luc Aufranc (CNXSoft) - No Comments

eduArdu is an Open Source Hardware Arduino Learning Board

Olimex has recently launched eduArdu, an open source hardware Arduino compatible board specifically designed for education with plenty of buttons, LEDs, and sensors, as well as tutorials and samples source code to help young and older aspiring makers get started with Arduino programming. eduArdu hardware specifications: MCU – Microchip ATMega32U4 AVR microcontroller (as used in Arduino Leonardo) Display – 8×8 LED matrix display Audio – Built-in microphone, buzzer User Inputs – Joystick with push button, 6 Maykey-Makey type buttons Sensors – Utrasound distance sensor, light sensor, PIR sensor, temperature sensor (-45 to +125C) Expansion Two servo motor connectors UEXT connector Debugging / Programming – 1x micro USB port Misc – RGB LED, IR transmitter, IR receiver, status LED, reset button Power Supply LiPo charger and battery connector 5V via USB port Dimensions – 170 x 75 mm Programming can be done with the Arduino IDE, or Snap4Arduino visual programming IDE. […]

December 18, 2018 by Jean-Luc Aufranc (CNXSoft) - 12 Comments

Wave Computing to Open Source MIPS Architecture

There has been a lot of talks about RISC-V open source, royalty-free instructions set architecture this year, including the launch of RISC-V MCUs and Linux capable RISC-V processors, and corresponding development boards such as Hifive Unleashed. This even lead Arm to create a – now shutdown – microsite telling why people should stick with Arm instead of RISC-V. While RISC-V was clearly on the rise this year, MIPS architecture once a dominant players in routers and set-top box has been on the decline, even prompting Blu to write a guest review entitled “Baikal T1 MIPS Processor – The Last of the Mohicans?” hinting at the near extincsion of MIPS based solutions. But there may be hope, or at least a last ditch effort, with Wave Computing purchasing MIPS from Imagination Technology earlier this year, and now announcing the MIPS Open Initiative to effectively open source 32-bit and 64-bit MIPS ISA […]

December 13, 2018December 12, 2018 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

BOOM Open Source RISC-V Core Runs on Amazon EC2 F1 Instances

The Berkeley Out-of-Order Machine (BOOM) is an open source RV64G RISC-V core written in the Chisel hardware construction language, and mainly ASIC optimized. However, it is also usable on FPGAs, and developers support the FireSim flow to run BOOM at over 90 MHz on Xilinx Ultrascale+ FPGAs found in Amazon EC2 F1 instances. The BOOM core was created at the University of California, Berkeley in the Berkeley Architecture Research group, in order to create a high performance, synthesizable, and parameterizable core for architecture research. Key features of BOOM core: ISA – RISC-V (RV64G) Synthesizable FPGA support Parameterized Floating Point (IEEE 754-2008) Atomic Memory Op Support Caches & Virtual Memory Boots Linux Privileged Arch v1.11 External Debug BOOM is said to be inspired by the MIPS R10k and the Alpha 21264 out–of–order processors, based on a unified physical register file design (aka as “explicit register renaming”). The source code for the […]

November 30, 2018 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

Necuno Mobile Open Source Linux Smartphone is Powered by NXP i.MX 6 Processor

A few years ago, various companies tried to develop other Linux based mobile operating systems, but most failed with Mozilla Firefox OS discontinued, Samsung Tizen is not being used in smartphones anymore, and Sailfish OS giving up the consumer market focusing on governmental and corporate customers instead. There’s still a niche market however for privacy-focused, open source Linux smartphones, and we’ve already covered NXP i.MX 8M based Purism Librem 5 smartphone scheduled to launch next year with GNOME based PureOS operating system, and the ability to switch to PureOS with KDE Plasma Mobile or Ubuntu Touch. Necuno Mobile will be another Linux smartphone based on an NXP processor, but instead of relying on a 64-bit i.MX 8M processor, it will be equipped with the older 32-bit i.MX 6Quad processor, and according to the company be “100% open source device, from metal to pixel, from hardware to software”. Necuno Mobile preliminary […]

November 22, 2018 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

Open Source Hardware SpiderSoM System-on-Module Features Intel MAX 10 FPGA

When embedded systems companies offer a system-on-module (SoM) and a baseboard, the later is usually open source hardware with all design files provided so that customers can leverage the work for their own baseboard, but files for the SoM are normally not released to customers. Intel MAX 10 FPGA based Aries SpiderSoM and SpiderBase change that, as the company has decided to release both the module and carrier board KiCAD designs under a CERN OHL v1.2 license. SpiderSoM system-on-module specifications: FPGA – Intel MAX 10 FPGA in F256 package from 10M04DC to 10M50DA System Memory – Optional 128/256/512MB DDR3 DRAM for 10M 16/25/40/50 FPGAs Storage – Optional 4 MB SPI NOR, optional 4 GB eMMC flash 230-pin MxM2 edge connector with 178x FPGA GPIO pins, including 13 LVDS transmitters and 54 receivers Misc – RTC with battery backup, programmable clock generator and PLL, with optional external reference input Power Supply […]