Arm Cortex-A65AE Targets Safety-Critical Automotive, Aviation, and Industrial Automation Applications

Arm introduced their first “Automotive Enhanced” processor with Cortex-A76AE last September. The processor targets autonomous driving applications, and comes with extra safety features such Dual Core Lock-Step (DCLS) running the same code on two different cores to continuously check the execution result is the same on both.

The company has now unveiled a second AE core with Cortex-A65AE, which Arm claims is the first multithreaded Automotive Enhanced Cortex-A CPU technology to deliver the highest safety levels with Dual Core Lock-Step (DCLS).

Arm Cortex-A65AE specifications:

• Architecture – Armv8-A (Harvard)
• Extensions – Armv8.1, Armv8.2, Cryptography, RAS, and Armv8.3 (LDAPR instructions only)
• ISA support – A64
• Microarchitecture
  • Out-of-order Pipeline
  • Superscalar
  • NEON/Floating Point Unit
  • Optional Cryptography Unit
  • Max number of CPUs in cluster – Eight
  • Physical Addressing (PA) – 44-bit
  • Dual Core Lock-Step
• Memory system and external interfaces
  • L1 I-Cache / D-Cache – 16KB to 64KB
  • L2 Cache – 64KB to 256KB
  • L3 Cache – Optional, 512KB to 4MB
  • ECC Support, LPAE  support
    Yes
  • Bus interfaces – AMBA ACE or CHI
  • Optional ACP
  • Optional Peripheral Port
• Other
  • Functional Safety Support – ASIL D diagnostics
  • Security – TrustZone
  • Interrupts – GIC interface, GICv4
  • Generic Armv8-A timer
  • PMUv3
  • Debug – Armv8-A (plus Armv8.2-A extensions)
  • CoreSight – CoreSightv3
  • Embedded Trace Macrocell – ETMv4.2 (instruction trace)

The main benefit include high throughput performance with dual-threaded, out-of-order execution, split-Lock capability which offers the flexibility to operate in two modes: split mode for performance and lock mode for safety, and fault-tolerant operation in lock mode with DCLS. The processor is suitable for automotive, industrial automation, and aviation applications.

Compared to Cortex-A53, Arm Cortex A65AE delivers 70% improved integer performance per core, 3.5x higher memory throughput for memory intensive automotive workloads, and over 6x higher read bandwidth on low-latency ACP for closely-coupled accelerators. There’s no word whether a consumer Cortex-A65 will also become available.

More details can be found on the product page, and the developer website.

Jean-Luc Aufranc (CNXSoft)

Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.

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