Arm has now unveiled another variant of Cortex-A76 core. Cortex-A76AE (Automotive Enhanced) is designed for automotive application, and specifically autonomous driving applications, thanks to extra safety features such as Split-Lock capability which includes the ability for Dual Core Lock-Step (DCLS). The latter means that two processors are running the same code at the same time, and the instructions is only validated is the results are identical on both processors.
Microarchitectural highlights of Cortex-A76AE for safety:
- Dual Core Lock-Step (DCLS) – The Cortex-A76AE is capable of running in Dual Core Lock-Step (DCLS), and hence is able to contribute towards a system’s ASIL D hardware diagnostic coverage requirements.
- Memory protection – The Cortex-A76AE supports Single Error Correction, Double Error Detection (SECDED) ECC and Parity protection in the L1 cache, and SECDED ECC protection with the ability to correct in-line, on the L2 and L3 caches.
- Reliability, Availability and Serviceability (RAS) features – As part of the Armv8.2 architecture extension, Cortex-A76AE includes standardized error reporting across the core and the DSU, error injection as a means of testing fault management, and data poisoning as a way of deferring error aborts till point of execution.
- Integrated comparators -The blocks compare outputs from the logical and redundant processing elements to detect for divergence. They follow the error reporting scheme as defined in the Armv8.2 RAS architecture.
The processor is largely based on Cortex-A76, and deliver 30% performance boost over Cortex-A75, and 60% over Cortex-A72. Cortex-A76AE is expected to deliver over 250K DMIPS at less than 15W TDP, with this level of performance fitting into a 30 Watts processor. Those numbers are apparently for a 16-core Cortex-A76AE system.
Cortex-A76AE supports DynamIQ technology, and is optimized to be manufactured with a 7nm process.
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