SiFive RISC-V Processors Get Performance & Efficiency Improvements, Smaller Footprint with 20G1 Release

SiFive RISC-V cores portfolio ranges from low power 32-bit IoT processors to more powerful, Linux-capable 64-bi RISC-V cores like the latest SiFive U84/U87 cores rivaling with Arm Cortex-A7x cores.

SiFive Core IP 20G1 release further enhances the company’s existing RISC-V cores with performance improvements, higher efficiency, and a smaller footprint.

SiFive Core IP 20G1 ReleaseSpecifically, SiFive claims the SiFive U7-Series has increased load bandwidth up to 2.8x for memory-intensive workloads such as AI inference processing, and all of the company’s RISC-V cores can now run at lower power, with the SiFive U74 standard core running at up to 25% lower power while running Dhrystone benchmark.

The SiFive E-Series processors which feature real-time capability are now available with the RISC-V Embedded extension (RV32E) which reduces the footprint compared to RV32I ISA with for instance up to 11% smaller area for the SiFive E3-Series. RV32E and RV32I have the same instructions set, but RV32E comes with 15 general-purpose registers instead of 31.

SiFive Core IP 20G1 also appears to be the first release with SiFive Insight bringing native Arm CoreSight compatibility and enabling developers to leverage their existing software development environment. The company updated SiFive Freedom Tools suite of SDKs, compilers, libraries, and code examples for the first “General Release” in 2020 (20G1).

SiFive Shield security platform also got updates with support for the Hardware Cryptographic Accelerator (HCA) IP add-on option offering a configurable mix of AES, SHA, and TRNG functions to enable secure Root of Trust and hardware-accelerated cryptographic functions.

You’ll find more details in the press release, blog post, and an upcoming webinar scheduled to take place on August 6th.

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