RISC-V open architecture allows designers to implement their own instructions, and some of those may become an official RISC-V extension. But the process to approve a new extension may have been suboptimal, so RISC-V International has just unveiled the Fast Track Architecture Extension Process, or Fast Track for short, that streamlines the ratification of small architecture extensions, as well as ZiHintPause, the first extension to be ratified under the new Fast Track process.
The process is designed for simpler extensions that are uncontentious and offer value to the RISC-V community at large, so it’s not suitable for more complex extensions. An extension that has been submitted for consideration will undergo an internal review before entering a 45-day public review process. You can read detailed rules for the new extension ratified process here.
The ZiHintPause extension went through this 45-day review process on Google Group, and was very recently ratified. The ZiHintPause extension is meant to reduce the energy consumption of designs, improve the performance of spin-wait loops, enable multithreaded cores to temporarily relinquish extension resources. The extension is really simple as it adds a single PAUSE instruction (encoded as a HINT instruction) to the RISC-V ISA.
We asked RISC-V International about a specific real-life use case showing the improved power consumption with the PAUSE instruction, but the organization was unable to provide this type of information at this time. For more details, you can read the one! page “Zihintpause” Pause Hint, Version 1.0 document describing the instructions.