Allwinner R128 wireless SoC features 64-bit RISC-V core, Arm Cortex-M33 core, and HiFi 5 audio DSP

Allwinner is mostly known for its low-cost Arm processor running Android or Linux, but the Allwinner R128 is a wireless audio SoC with a C906 64-bit RISC-V application core, an Arm Cortex-M33 real-time time core, a HiFi 5 DSP, and built-in WiFi and Bluetooth connectivity.

The SoC also comes with 1MB SRAM, up to 16MB flash, up to 32MB PSRAM, display and camera interfaces, support for microphone arrays, and plenty of I/Os that should make it suitable for smart speakers and other voice-controlled home appliances with or without display.

Allwinner R128

Allwinner R128 specifications:

  • Application core – Xuantie C906 64-bit RISC-V core clocked at 600 MHz.
  • DSP – Cadence HiFi 5 audio DSP clocked at 400 MHz
  • Communication core – Arm M33 Star (Cortex-M33 from Arm China?) core clocked at 240 MHz with Trustzone support
  • Memory
    • 1MB SRAM
    • 8MB, 16MB, or 32MB PSRAM (SiP = System-in-Package)
    • OPI PSRAM controller
  • Storage
    • QPI flash controller
    • 8MB or 16MB flash (SiP)
  • Display – TCON (RGB666) and SPI-DBI LCD interfaces up to 104×768 @ 60 fps with 2D graphic accelerator
  • Camera – DVP interface with JPEG encoder @ 720p24
  • Audio
    • 3x ADC, 2x DAC
    • 4x DMIC
    • 2x I2S
  • Wireless
    • 2.4 GHz 802.11b/g/n WiFi 4 with WPA3 security
    • Dual-mode Bluetooth 5.0 BR/DR and Low Energy (LE) with support for Long Range and Bluetooth Mesh
  • Peripherals
    • 3x UART, 2x SPI, 8x PWM, 2x I2C/TWI
    • IR Tx and Rx
    • 8x general-purpose ADC
    • USB 2.0 OTG
    • ISO/IEC 7816 smart card support
  • Supply Voltage – 2.5 to 5.5V Vbat single power supply

That’s about all the public information we have so far (from Twitter), as Allwinner R128 is not listed on the company’s website just yet. But we can do some informed speculation. The 64-bit RISC-V core is the same core as on the 1GHz Allwinner D1 SoC, except clocked at 600 MHz only, but it may run FreeRTOS or another RTOS like RT-Thread instead, as Linux may not be too happy even on a SiP with 32MB SPRAM because this type of memory is usually slow. It’s not to say it’s impossible, after all, ESP32 can run Linux too, but Linux will not be the primary OS on the Allwinner R128 SoC.

The Arm Cortex-M33 core should handle the WiFi and Bluetooth connectivity and the firmware should probably be closed-source because it handles the wireless part. The HiFi 5 audio DSP is designed for voice-controlled appliances and takes care of audio pre-processing and speech recognition/keyword detection. I can also see references to “Vbat” so I suspect it will be used on battery-operated devices as well.

It looks like an alternative to some Espressif Systems and Bouffalo Labs wireless SoCs designed for applications that may benefit from a more powerful application processor, as well as some extra features such as a JPEG encoder and a 2D graphics accelerator. We’ll have to wait to find out… [Update: GLGH_ has shared a render of an Allwinner R128 S3 module with the same pinout as the ESP32-S3-WRROM-1 module, except for additional castellated holes for audio

Allwinner R128 module vs ESP32-S3 module


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