Ingenic Unveils Newton2 Platform for Wearables with M200 Dual Core SoC

Ingenic Newton is a development platform for wearables powered by Ingenic JZ4775, an application processor mostly used in tablets. Many companies are now making SoCs speficially designed for wearables with a powerful application core, and a low power core serving as a sensor hub, an Ingenic M200 SoC found in the new Ingenic Newton2 platform, uses the sample principle by combinging a MIPS XBurst processor @ 1.2GHz with a low power MIPS XBurst core @ 300MHz combined with low power GPU and VPU.

Inegnic Newton2 Board (Click to Enlarge)
Inegnic Newton2 Board (Click to Enlarge)

Ingenic Newton2 specifications:

  • SoC – Ingenic M200 dual core processor with MIPS XBurst @ 1.2 GHz, MIPS XBurst @ 300 MHz, 2D/3D GPU, and VPU supporting H.264, VP8, MPEG-1/2/4, VC-1, and RV9 up to 720p30
  • System Memory – 512 MB LPPDR2 (Samsung eMCP)
  • Storage – 4GB eMMC (Samsung eMCP)
  • Connectivity – 802.11 b/g/n Wi-Fi + Bluetooth 4.1 (Broadcom BCM43438) + connector for GPS
  • Sensors – Gyroscope, accelerometer, magnetometer (IvenSense MPU-9250)
  • Expansion Headers –  24-pin display connector, MIPI CSI / I2C camera connector, DMIC and AOHPL/R audio connector, GPS and sensors header including UART, I2C, and GPIO pins. touch connector, 14-pin button connector, and 4-pin Wi-Fi and 2.4 GHz BT connector.
  • Power Supply – Li-on battery: 3.7~4.2V or Micro USB: 5.0V;  Ricoh RC5T619 PMIC; Standby power consumption: < 3 mW
  • Dimensions – 15 x 30 x 2.4 mm
Newton2 Block Diagram
Newton2 Board Block Diagram

Compared to the original Newton board, Newton2 is about 50% smllaer, and consumes much less power resulting in improved battery life. Target applications include smartwatches, augmented reality headsets, smart glasses, smart cameras, wearable healthcare monitors, activity trackers, smart clothing, etc… The platform runs Android 4.4 + Linux 3.10, but there’s no mention of Android Wear support.

Ingenic_M200_SoC_Block_Diagram

 Key features of Ingenic M200 as listed on Anandtech:
Package BGA270, 7.7mm x 8.9mm x 0.76mm, 0.4mm pitch
CPU XBurst1-HP core, 1.2 GHz
XBurst1-LP core, 300 MHz
GPU 2D/3D acceleration with OpenGL ES 2.0/1.1. OpenVG 1.1
VPU Video encoder up to 720p @ 30fps: H.264, VP8
Video decoder up to 720p @ 30fps: H.264, VP8, MPEG-1/2/4, VC-1, RV9
ISP HDR, video and image stabilization, crop and rescale, auto exposure + gain + white balance + focus control, edge sharpening, noise reduction, color correction, contrast enhancement, gamma correction
Memory DDR2, DDR3, LPDDR, LPDDR2 up to 667 Mbps
64-bit ECC NAND flash support Toggle 1.0 and ONFI2.0
Display LCD controller with OSD: TFT, SLCD and MIPI-DSI (2-lanes)
E-Ink controller
Camera MIPI-CSI2 (2-lanes), DVP
Audio Audio CODEC with 24-bit ADC/DAC, stereo line-in, MIC in, and headphone interface
Low power DMIC controller
AC97/I2S/SPDIF interface for external audio codec
One PCM interface, supports both master and slave modes
Voice trigger engine to wake system by programmable specific voice
ADC 3 channels 12-bit SAR
Interfaces USB 2.0 OTG x 1
MMC/SD/SDIO controller x 2
Full-duplex UART port x 5
Synchronous serial interface x 2
Two-wire SMB serial interface x 4
Software Android 4.4

Ingenic M200, or another Ingenic SoC for wearables (M150), is said to be used in GEAK Watch 2, which can deliver 2-week of battery life. The crowdfunding campaign for the watch is still on-going.

Pricing and availability have not been disclosed for Ingenic Newton2, and if history is any guide, the board will be reserved to corporate customers, just like Ingenic Newton was. More details may be found on Ingenic Newton2 ad M200 SoC product page.

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7 Replies to “Ingenic Unveils Newton2 Platform for Wearables with M200 Dual Core SoC”

  1. I bet these MIPS processors use those damn PowerVR GPUs (as both MIPS and PowerVR are unfortunately owned by Imagination)… Unfortunately pretty reasonable MIPS(32/64) architectures got shafted. 🙁

  2. > as both MIPS and PowerVR are unfortunately owned by Imagination

    So what, ARM owns Mali, does it mean all ARMs stuff it? Nope, whatever particular SoC vendor wants, it puts there.

    > pretty reasonable MIPS(32/64) architectures got shafted.

    Ingenic chips have exactly this “reasonable”, also can be described as “old” or “classic”, architecture. They bought license long ago, added their own arch extension (Xburst) and don’t hurry to care much about newer Imagination hacks. Imagination indeed will need to open up first before other MIPS players will trust it.

  3. @Paul
    If Imagination _allows_ other GPU/VPU combos to be used with their CPU cores, then it’s fine, personally have not seen that being done.

    MIPS(32/64) beats ARM on certain things, and ARM beats in others, so they are very comparable… This comes from an old (SGI-era) MIPS fan… At one point only architecture besting the MIPS was the almighty ALPHA (sad about its demise via HP too), but at least its legacy was continued by AMD64, and Nehalem later on.

    An sea-of-cores MIPS64 with HMC/HBM could still change the game (that Opteron A1100 is aiming at).

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