HiSilicon Hi1620 Server SoC to Features up to 64 Arm “Ares” Cores

A few years ago we covered Hisilicon D02 server board powered by the company’s Hip05 SoC with 16 or 32 Arm Cortex A57 cores. I had not seen any updates since then myself, but HiSilicon has released new “TaiShan” Arm based server SoCs every year, and recently unveiled Hi1620, the world’s first 7nm datacenter Arm processor, featuring 24 to 64 Arm “Ares” cores clocked at up to 3.0 GHz. Ares cores are supposed to greatly improve single thread performance in order to compete with x86 server chips.

Hisilicon Hi1620
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HiSilicon Hi1620 processors specifications:

  • CPU – 24 to 64 Ares ARMv8.2 cores clocked at 2.4 – 3.0 GHz
  • Cache – L1: 64KB I-cache, 64KB D-cache; L2: 512KB private per core, L3: 24-64 shared among cores (1MB/core)
  • Memory – 8x DDR4 channels up to 3200 MHz
  • Interconnect – Coherent SMP interface for 2S & 4S, 3 ports up to 240 Gbit/s per port
  • I/Os
    • 40x PCIe Gen 4.0 lanes
    • 2x 100 GbE, RoCEv2/RoCEv1, CCIX
    • 4x USB 3.0
    • 16x SAS 3.0, 2x SATA 3.0
  • Package – 75 x 60 mm, BGA
  • Power – 100 to 200 Watts TDP
  • Process – 7 nm

Anandtech reports vendors are expected Ares cores to achieve Intel Skylake levels of  performance, and Hi1620 is said to be fine-tuned for memory-bound workloads such as CAE/CFD, weather and life-science.. Although an internal Hisilicon D06 development board exists, Huawei did not show any samples at the event either. So it will take some more time before it becomes available, and Arm has not provided details about Ares architecture yet. We should expect more details next year.

As a side note, Arm has made progress in high-performance computing, as there’s now one Arm supercomputer that made it to the top 500 list: Astra, built by HPE, deployed at Sandia National Laboratories, and equipped with 125,328 Cavium ThunderX2 cores delivering an HPL Linpack score of 1.5 petaflops. It’s currently listed at number 204.

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