Renesas introduces sub 50 cents FPGA family with free Yosys-based development tools

Renesas has just unveiled the ForgeFPGA family of low-cost low-power FPGA’s to go for under 50 cents in (large) volumes following their acquisition of Dialog Semiconductors last August, who previously designed the GreenPAK programmable mixed-signal matrix.

The company says its FPGAs consume half the power of competing FPGAs with a standby current of under 20uA, the price point will enable the use of FPGA in new markets and IoT products, and the tools will be free, at least as in beer, without any license to acquire or install.

Renesas FPGA family

The full specifications are not available yet, but the ForgeFPGA Family will come with a maximum of 5,000 gates of logic, and the first devices ship with 1K and 2K Look Up Tables (LUTs), and as just mentioned, will operate at ultra-low power as low as 20 microamps in standby. ForgeFPGA is expected to target the same market as GreenPAK notably embedded sensors and IoT devices.

Contrary to most other FPGA vendors, the Renesas development tools will be completely free, and without the hassle of having to install license keys. The “Go Configure Software Hub” will allow engineers to work on FPGA design depending on the experience levels with two modes of development that can be switched on the flu while the software is running:

  • “HDL Mode” for  experienced FPGA
  • “Macro-cell Mode” uses schematic-capture-based development flow

The software hub can be used to launch GreenPAK Designer and ForgeFPGA Workshop programs, with the latter – as the screenshot below shows – appearing to rely on Yosys open synthesis suite whose code is available on Github.

ForgeFPGA Workshop

You can even try the beta now, after registration, with the software running on Windows 7/8.1/10 32-/64-bit, macOS v10.13 or higher, Ubuntu 18.04/20.04 64-bit, and Debian 10/11/Testing 32-/64-bit. You don’t need a powerhouse to develop software for such low-end FPGA either as the minimum hardware requirements include a 2,500 MHz processor, at least 512MB RAM, 128MB graphics RAM, and 750MB of free hard disk space. Note the download link will be provided immediately, so you don’t need to share a working email.

I had to install it as follows since some packages were missing from my Ubuntu 20.04 system:

Go Configure Software Hub Ubuntu

The good thing is that we can find some details about the first ForgeFPGA part in the software with Renesas SLG47910V FPGA to launch with the following specifications:

  • Dense Logic Array
    • Equivalent to 900 4-bit LUTs
    • 1.8 k DFFs
    • 5 kb distributed memory
    • 32 kb BRAM
    • Configurable through NVM and/or SPI interface
  • 50 MHz High-frequency Oscillator
    • 3.41 MHz Low-power mode
  • Phase-locked Loop (PLL) – Input from external source or internal oscillators;
  • Power Supply
    • VDDIO: 1.71 V to 3.6 V;
    • VDDCore: 1.1 V ± 10%;
  • Power-On-Reset (POR)

I can remember I used a CLPD in a product many years ago to emulate a CF card reader, that was programmed with VHDL, so I suppose this FPGA family targets similar applications but its internal structure is different and should offer more flexibility.

Renesas says the ForgeFPGA FPGA engineering samples are available now together with a prototype development kit, probably only available to partners at this stage. The 1K LUT device, which should be the SLG47910V model described above, is expected to be in mass production in Q2 2022. You may find a few more details in the press release, and the product page.

Thanks to TLS for the tip.

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