After the Arndale board based on Samsung Exynos 5250 processor (dual core Cortex A15), Insignal is in the process of completing the development of Arndale Octa board powered by Exynos 5410 with 4 Cortex A15 and 4 Cortex A7 (aka Samsung Exynos 5 Octa), and howchip.com is now accepting “pre-orders”, at an undisclosed price, and the board is expected to ship by July.
A picture of the board is not available yet, but the specifications are (sort of):
- ARM Cortex-A15 (eagle or big core) Quad CPU with NEON/VFP as high performance processor with 32/32KB I/D Cache, 2 MB L2 Cache.
- ARM Cortex-A7 (kingfisher or little core) Quad CPU as power-efficient performance processor with 32/32 KB I/D Cache, 512 KB L2 Cache. This processor is architecturally aligned with Cortex-A15
- 128-bit multi-layer Network-on-Chip (NoC) architecture
- Cache Coherent Interface (CCI) among Cortex-A15 and Cortex-A7, G2D, and SSS
- DRAM access through two channels of 32-bit LPDDR3 [email protected] MHz (12.8 GB/Sec)
- 64 KB ROM for secure booting and 336 KB internal RAM for security function
- External SRAM/PROM/NOR Interface with x16 data bus
- Multi-core timer and generic interrupt controller/combiner for multi-core CPU system
- 32 Channel DMA controller (16 Channels MDMA and 16 Channels PDMA)
- Real time clock (RTC)
- Highly structured power management system for mobile applications
- Flexible clock management system with nine system PLLs
- 3D graphic accelerator with multi-core GPU. This GPU supports OpenGL ES1.1 and 2.0, OpenVG 1.0.1
- Separate 2D graphic accelerator
- Multi-format codec (MFC). It provides encoding and decoding of MPEG-4/H.263/H.264/Divx up to 1920×[email protected] and decoding of MPEG-2/VC1 video up to [email protected]
- Two kinds of high performance JPEG codec for various compression formats
- Five generic scalers and one image rotator
- 1/2/4/8 bpp palletized or 16/18/24 bpp non-palletized color TFT support
- WQXGA LCD display through embedded DisplayPort and WUXGA for MIPI DSI interface.
- HDMI V1.4 interface for TV monitor
- Highly customized image enhancer
- Three channels of MIPI CSI interface for three camera support (stereo cameras with a front-view camera)
- High performance ISP engine with DRC, 3DNR, VDIS, ODC, FD, and 3AA features. The ISP engine can accommodate one of these scenarios: 13 [email protected], [email protected] + 3 [email protected]
- Dedicated peripherals for camera module control (ADC, PWM, SPI and UART)
- Ultra low-power audio decoding mode with internal SRAM
- I2S/PCM (3 Channel), AC-97 (1 Channel), and SPDIF Tx (1 Channel)
- SD3.0/MMC5.0 interfaces (2 Channels, 8-bit, .1.8 V only) and SD3.0 interfaces (1 Channel, 4-bit, wide-range)
- Super-speed (5 Gbps) USB3.0 DRD (2 Channels) with USB2.0 backward compatibility
- High-speed/full-speed USB 2.0 Device/OTG (1 Channel)
- USI with high-speed I2C (4 Channels) and I2C (4 Channels)
- SPI (3 Channels) and 3 Mbps UART (4 Channels) for Bluetooth 2.0
- On-chip HSIC (2 Channels) MIPI-HIS (1 Channel) for modem chip I/F
- Sturdy crypto engine with DTRNG, hardware hash function accelerator, provision keys, and monotonic counters
- 12-bit general purposed ADC (10 Channels), on-die thermal sensors (4 units), logic-speed monitors for dynamic voltage/frequency scaling of CPU and GPU, and adaptive back-bias controllers for logic speed and leakage optimization
The list above is more about Exynos 5410 specifications than the board itself, that will come with (Gb?) Ethernet, USB 2.0 and 3.0 ports, eMMC and SD card slot for storage, HDMI output, a serial port for debugging, and more.
The company will also provide a sound board, a connectivity board, a camera Board and an LCD Board. There’s no information about software, and documentation for now, but we can safely assume Android will be supported fully, and Linux will also be available.