Allwinner V853 Arm Cortex-A7 + RISC-V SoC comes with 1 TOPS NPU for AI Vision applications

Allwinner V853 SoC combines an Arm Cortex-A7 core with a Xuantie E907 RISC-V core, and a 1 TOPS NPU for cost-sensitive AI Vision applications such as smart door locks, smart access control, AI webcams, tachographs, and smart desk lamps.

Manufactured with a 22nm process, the SoC comes with an ISP image processor and Allwinner Smart video engine capable of up to 5M @ 30fps H.265/H.264 encoding and 5M @ 25fps H.264 decoding, offers parallel CSI and MIPI CSI camera interfaces, and well as MIPI DSI and RGB display interfaces.

Allwinner V853

Allwinner V853 specifications:

  • CPU
    • Arm Cortex-A7 CPU core @ 1 GHz with 32 KB I-cache, 32 KB D-cache, and 128 KB L2 cache
    • Alibaba Xuantie E907 RISC-V core with 16 KB I-cache and 16 KB D-cache
  • NPU (Neural network Processing Unit) – Up to 1 TOPS for V853 and 0.8 TOPS for V853S,  embedded 128KB internal buffer, support for TensorFlow, Caffe, Tflite, Pytorch, ONNX, etc..
  • VPU (Video Processing Unit)
    • Encoding
      • H.265/H.264 encoding up to 3840×2160 @ 20fps
      • Multi-stream real-time encoding up to 5M @ 25fps + 720p @ 25fps
      • MJPEG/JPEG baseline encoding up to 1080p60
    • Decoding – H.264/JPEG decoding up to 16 megapixels (4096×4096)
  • Memory I/F – 16-bit DDR3/DDR3L
  • Storage I/F – SD 3.0/eMMC 5.1 flash, SPI NOR/SPI NAND flash
  • Video Output
    • 4-lane MIPI DSI up to 1920 x 1200 @ 60fps
    • RGB interface with DE/SYNC mode up to 1920 x 1080 @ 60fps
  • Video Input
    • ISP supporting up to 5M @ 30 fps, and a maximum resolution of 3072 x 3072
    • Parallel CSI supporting 8/10/12/16-bit width
    • 4-lane MIPI CSI input or two 2-lane MIPI CSI inputs; maximum video capture resolution up to 5M @ 30fps
  • Audio
    • 1x 16-bit/20-bit DAC with 8 kHz to 192 kHz sample rate
    • 2x 16-bit/20-bit ADC with 8 kHz to 48 kHz sample rate
    • 2x differential microphone inputs: MICIN1P/N, MICIN2P/N
    • 1x differential lineout output (LINEOUTP/LINEOUTN)
    • 2x I2S/PCM external interfaces (I2S0, I2S1)
    • Up to 8 digital PDM microphones with sample rates from 8 kHz to 48 kHz
  • Other Peripherals
    • 5x TWI (I2C) interfaces, 4x UART interfaces, 4x SPI interfaces
    • 8x GPIO, 1x 12-ch PWM controller
    • 4x general-purpose analog-to-digital converter (GPADC)
    • USB 2.0 DRD
  • Package – LFBGA 318
  • Process – 22nm
Allwinner V853/R853S system block diagram
Typical Allwinner V853/R853S application block diagram

A thread on a Chinese forum mentions the NPU on V853 is “very open” not like the one on V831, and Allwinner also provides a V851 model with 64MB or 128MB built-in memory. The Allwinner R853 is the same but designed for robots with motor control. I suppose R853S shown above is a variant with a 0.8 TOPS NPU like for V853S… More details specifications can be found on linux-sunxi website. The Arm Cortex-A7 should probably run Linux (OpenWrt based TinaLinux?), and the RISC-V MCU core handles low power modes and I/Os, but it is not entirely clear how they work together, and which core handles what.

MangoPi team is also working on a compact (27.5×42.5 mm) MQ-V Ai Core module based on Allwinner V853 with 512 MB DDR3, 8GB eMMC flash, and an AXP2101 PMU, so we’ll certainly find out more in a couple of months.

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2 years ago

Any links to the SDK so we can see whether it’s a similar NPU to the V831 which I mainly reversed engineered?

2 years ago

The npu of 853 is VeriSilicon ip, which is very similar to rk356x. This is completely different from the 833.

2 years ago

Would you please post a link to this project? It sounds very interesting!

Jon Smirl
2 years ago

Since this has binocular cameras, I wonder if it can do hardware depth mapping without utilizing all of the NPU. Maybe ISP can do it?

This chip appears to have all of the peripherals I need, but what is the price?

Do these disparate CPUs both run out of the same DRAM? How do you communicate between them, can they safely place locks in memory?

Khadas VIM4 SBC