Renesas RZ/G2L MPUs Feature Cortex-A55 & Cortex-M33 Cores for AI Applications

Renesas Electronics Corporation announced RZ/G2L MPUs, allowing enhanced processing for an extensive variety of AI applications. The RZ/G2L group of 64-bit MPUs includes three new MPU models featuring Arm Cortex-A55, and an optional Cortex-M33 core. These are RZ/G2L, RZ/G2LC, and RZ/G2UL MPUs. The Cortex-A55 CPU core typically delivers approximately 20 percent improved processing performance compared with the previous Cortex-A53 core, and according to Renesas, is around six times faster in “essential processing for AI applications”.

The company already has four mid to high-end design level MPUs including RZ/G2E, RZ/G2N, RZ/G2M, and RZ/G2H, with combinations of Cortex-A53 and Cortex-A57 cores. The new RZ/G2L group of three MPUs forms the entry-level design with Cortex-A55. Hence, the seven MPU models together provide scalability from entry-level to high-end design.

Family of Renesas MPUs

Common Key Features in RZ/G2L, RZ/G2LC, and RZ/G2UL MPUs

  • Up to 2x Cortex-A55 cores
  • Cortex-M33 core
  • Camera interface (MIPI-CSI)
  • Display interface (Parallel-IF)
  • USB 2.0 interface 2ch, SD interface 2ch
  • CAN interface (CAN-FD)
  • 2x Gigabit Ethernet
  • DDR4 or DDR3L memory interface with memory error detection/correction (ECC)
  • BGA Package 

The RZ/G2L and RZ/G2LC MPU have one or two Cortex-A55 cores working at 1.2 GHz, whereas the RZ/G2UL MPU has a single Cortex-A55 core working at 1GHz. The Cortex-M33 allows real-time processing of like sensor data collection without the need for additional external devices in order to reduce the overall cost of the system. The Cortex-M33 is optional for RZ/G2UL. 

Block Diagram of RZ/G2L

Block Diagram of RZ-G2L

The 3D Graphics engine includes Arm Mali-G31 GPU in RZ/G2L and RZ/G2LC dual-core MPUs along with the camera and display interfaces with applications in industrial HMI, home appliances, and security cameras. Renesas RZ/G2L additionally has a video codec for H.264 encoding/decoding, so it is also suitable for Intercom, doorbells, POS terminals, and other AI image processing applications.

The RZ/G2UL single-core MPU comes with a simple LCD controller along with similar interfaces to the dual-core MPUs. This makes it suitable for applications such as entry-class industrial gateway control and embedded devices with Simple GUI capabilities. The camera interface only supports MIPI serial connection, whereas the display interface operates with parallel-IF.

Comparison of RZ-G2L Group of MPUs

The company says “MPUs have a Verified Linux Package (VLP) featuring the Civil Infrastructure Platform (CIP) Linux, an industrial-grade Linux offering guaranteed support and security maintenance for more than 10 years, is available. This makes it possible to reduce future maintenance costs. The support for security functions means that customers can also confidently adopt the RZ/G2L Group MPUs for industrial applications requiring high reliability and extended service life.”

The company also plans future pin-compatible parts integrating the DRP-AI accelerator already found in RZ/V2M Cortex-A53 processor. The RZ/G2LC and RZ/G2UL come with a 13 mm square BGA package, whereas the RG/G2L comes with a 15mm square as well as a 21 mm square package.

Evaluation Kit for Renesas RZ/G2L Group of MPUs

Evaluation Kit for Renesas RZ-G2L Group of MPUs

The reference board for RZ/G2L group has a SMARC v2.1 Module board along with the configuration of the carrier board.  The evaluation of each device by done by exchanging SOMs.

Module board (Dimension: 82mm x 50mm)

  • Processor: RZ/G2L / RZ/G2LC / RZ/G2UL
  • Main Memory: 2GB DDR4 (1GB x2)
  • QSPI NOR FLASH: 64MB
  • eMMC Memory: 64GB
  • External Storage: micro SD x1
  • A/D Converter Interface x6
  • JTAG connector

Carrier board (Dimension: 160mm x 100mm)

  • Gigabit Ethernet x2
  • USB2.0 x 2ch (OTG x1ch, Host x1ch)
  • MIPI CSI-2 Camera connector (can connect to Google Coral
    Camera)
  • Micro HDMI (output) connector
  • CAN-FD x2
  • External Storage: micro SD x1
  • Audio Line-in x1
  • Audio Line out x1
  • PMOD x2
  • USB-Type C for Power Input

The sample shipments of the MPUs have started on 19th January 2021. The mass production is expected to start at beginning of August 2021. The company is accepting reservations for the evaluation boards for the RZ/G2L group of MPUs. For more information visit the announcement and the product pages of RZ/G2L, RZ/G2LC, and RZ/G2UL MPUs.

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7 Comments
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Jean-Luc Aufranc (CNXSoft)
Admin

Does anyone know why Cortex-A55 would be six times faster than Cortex-A53 for processing AI applications?

Theguyuk
Theguyuk
3 years ago

Did we really see a 20% boost in speed between S905X2 and S905X3 at the same speed.

nobe
nobe
3 years ago

anandtech explains some things that might be related to this claim : https://www.anandtech.com/show/11441/dynamiq-and-arms-new-cpus-cortex-a75-a55/4
(see the text above and below the neon/fpu image)

willy
willy
3 years ago

To summarize they indeed probably refer to the new native FP16 & INT8 as well as the twice faster FMA. Memory speed must not be neglected, the L2 is twice as fast as the previous one, and loads and store can now happen in parallel, which is convenient for memcpy() or data conversion which typically happens in image processing. So it’s likely the considered all this to arrive to that magical number “6”.

TheDude
TheDude
3 years ago

Probably the A55 ‘optional’ dot product instruction:

Exploring dot product machine learning – Tools, Software and IDEs blog – Software Tools – Arm Community

The example provided by arm shows 402 vs 73, ~5.5. If one than adds the other speed advantages of the A55 over the A53 on will surely get to a figure over 6.

itchy n scratchy
itchy n scratchy
3 years ago

How do A53/55/57 compare in general? Performance and efficiency wise?

I once had a phone with A53 and A57 and it was kind of a heating central, albeit performing ok.

David Willmore
David Willmore
3 years ago

I have to agree. I haven’t seen an A57 in anything that wasn’t a heater. It’s a very old core at this point.

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